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-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index cb301949ae..a07d0e9482 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -25,11 +25,11 @@ namespace llvm {
struct SUnit;
class MachineConstantPool;
class MachineModuleInfo;
+ class MachineRegisterInfo;
class MachineInstr;
class MRegisterInfo;
class SelectionDAG;
class SelectionDAGISel;
- class SSARegMap;
class TargetInstrInfo;
class TargetInstrDescriptor;
class TargetMachine;
@@ -243,7 +243,7 @@ namespace llvm {
const TargetMachine &TM; // Target processor
const TargetInstrInfo *TII; // Target instruction information
const MRegisterInfo *MRI; // Target processor register info
- SSARegMap *RegMap; // Virtual/real register map
+ MachineRegisterInfo &RegInfo; // Virtual/real register map
MachineConstantPool *ConstPool; // Target constant pool
std::vector<SUnit*> Sequence; // The schedule. Null SUnit*'s
// represent noop instructions.
@@ -253,8 +253,7 @@ namespace llvm {
SmallSet<SDNode*, 16> CommuteSet; // Nodes the should be commuted.
ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb,
- const TargetMachine &tm)
- : DAG(dag), BB(bb), TM(tm) {}
+ const TargetMachine &tm);
virtual ~ScheduleDAG() {}