diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 16 |
2 files changed, 17 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index ccec18476f..139fc95b67 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1203,7 +1203,7 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy, Ops.push_back(InFlag); // FIXME: Do not generate X86ISD::TAILCALL for now. - Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops); + Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, NodeTys, Ops); InFlag = Chain.getValue(1); NodeTys.clear(); diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 4ea13fe9b7..77c167242c 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -75,6 +75,9 @@ def X86callseq_end : def X86call : SDNode<"X86ISD::CALL", SDT_X86Call, [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; +def X86tailcall : SDNode<"X86ISD::TAILCALL", SDT_X86Call, + [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; + def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr, [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr, @@ -2329,6 +2332,19 @@ def : Pat<(store (X86Wrapper texternalsym:$src), addr:$dst), (MOV32mi addr:$dst, texternalsym:$src)>; // Calls +def : Pat<(X86tailcall R32:$dst), + (CALL32r R32:$dst)>; + +def : Pat<(X86tailcall (loadi32 addr:$dst)), + (CALL32m addr:$dst)>; + +def : Pat<(X86tailcall tglobaladdr:$dst), + (CALLpcrel32 tglobaladdr:$dst)>; +def : Pat<(X86tailcall texternalsym:$dst), + (CALLpcrel32 texternalsym:$dst)>; + + + def : Pat<(X86call tglobaladdr:$dst), (CALLpcrel32 tglobaladdr:$dst)>; def : Pat<(X86call texternalsym:$dst), |