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-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp4
-rw-r--r--test/CodeGen/X86/fold-and-shift.ll20
2 files changed, 14 insertions, 10 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 441267a2a4..b155f742d6 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -847,6 +847,10 @@ static bool FoldMaskAndShiftToScale(SelectionDAG &DAG, SDValue N,
uint64_t Mask,
SDValue Shift, SDValue X,
X86ISelAddressMode &AM) {
+ // FIXME!! Hack to disable this and see if it is responsible for a miscompile
+ // on llvm-gcc's selfhost.
+ return true;
+
if (Shift.getOpcode() != ISD::SRL || !Shift.hasOneUse() ||
!isa<ConstantSDNode>(Shift.getOperand(1)))
return true;
diff --git a/test/CodeGen/X86/fold-and-shift.ll b/test/CodeGen/X86/fold-and-shift.ll
index 93baa0e0ee..816ab97e31 100644
--- a/test/CodeGen/X86/fold-and-shift.ll
+++ b/test/CodeGen/X86/fold-and-shift.ll
@@ -39,11 +39,11 @@ define i32 @t3(i16* %i.ptr, i32* %arr) {
; To make matters worse, because of the two-phase zext of %i and their reuse in
; the function, the DAG can get confusing trying to re-use both of them and
; prevent easy analysis of the mask in order to match this.
-; CHECK: t3:
-; CHECK-NOT: and
-; CHECK: shrl
-; CHECK: addl (%{{...}},%{{...}},4),
-; CHECK: ret
+; BROKEN: t3:
+; BROKEN-NOT: and
+; BROKEN: shrl
+; BROKEN: addl (%{{...}},%{{...}},4),
+; BROKEN: ret
entry:
%i = load i16* %i.ptr
@@ -58,11 +58,11 @@ entry:
define i32 @t4(i16* %i.ptr, i32* %arr) {
; A version of @t3 that has more zero extends and more re-use of intermediate
; values. This exercise slightly different bits of canonicalization.
-; CHECK: t4:
-; CHECK-NOT: and
-; CHECK: shrl
-; CHECK: addl (%{{...}},%{{...}},4),
-; CHECK: ret
+; BROKEN: t4:
+; BROKEN-NOT: and
+; BROKEN: shrl
+; BROKEN: addl (%{{...}},%{{...}},4),
+; BROKEN: ret
entry:
%i = load i16* %i.ptr