diff options
| -rw-r--r-- | lib/Target/ARM/ARMConstantIslandPass.cpp | 14 | ||||
| -rw-r--r-- | lib/Target/ARM/Thumb2SizeReduction.cpp | 13 |
2 files changed, 19 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index dd81796e8a..f8f717e4d4 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -1576,6 +1576,16 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) { Scale = 4; } break; + case ARM::t2LDRi12: + // FIXME: Temporary workaround for a bug introduced by r121082. + // We should use t2LDRpci for loads from constantpools. + if (isARMLowRegister(U.MI->getOperand(0).getReg()) && + U.MI->getOperand(1).getReg() == ARM::PC) { + NewOpc = ARM::tLDRpci; + Bits = 8; + Scale = 4; + } + break; } if (!NewOpc) @@ -1586,6 +1596,10 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) { // FIXME: Check if offset is multiple of scale if scale is not 4. if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) { U.MI->setDesc(TII->get(NewOpc)); + if (NewOpc == ARM::tLDRpci) + // FIXME: Temporary workaround. + // PC is now an implicit operand. + U.MI->RemoveOperand(1); MachineBasicBlock *MBB = U.MI->getParent(); BBSizes[MBB->getNumber()] -= 2; AdjustBBOffsetsAfter(MBB, -2); diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index a8badf7173..3d7bcb23f8 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -294,14 +294,11 @@ Thumb2SizeReduce::ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI, HasImmOffset = true; HasOffReg = false; } else { - if (Entry.WideOpc == ARM::t2LDRi12) { - Opc = ARM::tLDRpci; - OpNum = 2; - } - - HasImmOffset = false; - HasBaseReg = false; - HasOffReg = false; + // FIXME: Temporary workaround for a bug introduced by r121082. + // We should use t2LDRpci for loads from constantpools. + // We don't want to narrow this to tLDRpci until constant island pass + // for fear of pessimizing code. + return false; } break; case ARM::t2LDRBi12: |