diff options
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.td | 9 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8RegisterInfo.td | 9 |
2 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td index 09246c0a41..6d2496dbcb 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.td +++ b/lib/Target/Sparc/SparcRegisterInfo.td @@ -24,6 +24,15 @@ class Rf<bits<5> num> : Register { class Rd<bits<5> num> : Register { field bits<5> Num = num; } +// Rs - Special "ancillary state registers" +class Rs<bits<5> num> : Register { + field bits<5> Num = num; +} + +// Special register used for multiplies and divides +let Namespace = "V8" in { + def Y : Rs<0>; +} let Namespace = "V8" in { def G0 : Ri< 0>; def G1 : Ri< 1>; def G2 : Ri< 2>; def G3 : Ri< 3>; diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.td b/lib/Target/SparcV8/SparcV8RegisterInfo.td index 09246c0a41..6d2496dbcb 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.td +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.td @@ -24,6 +24,15 @@ class Rf<bits<5> num> : Register { class Rd<bits<5> num> : Register { field bits<5> Num = num; } +// Rs - Special "ancillary state registers" +class Rs<bits<5> num> : Register { + field bits<5> Num = num; +} + +// Special register used for multiplies and divides +let Namespace = "V8" in { + def Y : Rs<0>; +} let Namespace = "V8" in { def G0 : Ri< 0>; def G1 : Ri< 1>; def G2 : Ri< 2>; def G3 : Ri< 3>; |