diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 4 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb-tests.txt | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 352c062016..a868e73350 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1238,10 +1238,10 @@ def t2LDRSH_PRE : T2Iidxldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn), AddrModeT2_i8, IndexModePre, IIC_iLoad_bh_iu, "ldrsh", "\t$Rt, $addr!", "$addr.base = $Rn", []>; -def t2LDRSH_POST : T2Iidxldst<1, 0b01, 1, 0, (outs GPR:$dst, GPR:$Rn), +def t2LDRSH_POST : T2Iidxldst<1, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn), (ins GPR:$base, t2am_imm8_offset:$addr), AddrModeT2_i8, IndexModePost, IIC_iLoad_bh_iu, - "ldrsh", "\t$dst, [$Rn], $addr", "$base = $Rn", + "ldrsh", "\t$Rt, [$Rn], $addr", "$base = $Rn", []>; } // mayLoad = 1, neverHasSideEffects = 1 diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index c0e0d6ba0a..3b3351faaf 100644 --- a/test/MC/Disassembler/ARM/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -277,3 +277,6 @@ # CHECK: and.w r5, r1, r10, ror #7 0x1 0xea 0xfa 0x95 + +# CHECK: ldrsh r6, [sp], #81 +0x3d 0xf9 0x51 0x6b |