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-rw-r--r--lib/Target/X86/X86InstrControl.td15
-rw-r--r--test/MC/Disassembler/X86/intel-syntax.txt6
-rw-r--r--test/MC/X86/intel-syntax-encoding.s13
-rw-r--r--test/MC/X86/x86-32.s8
-rw-r--r--test/MC/X86/x86-64.s4
5 files changed, 41 insertions, 5 deletions
diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td
index ba86098390..bf11fdec5a 100644
--- a/lib/Target/X86/X86InstrControl.td
+++ b/lib/Target/X86/X86InstrControl.td
@@ -21,20 +21,25 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1,
def RET : I <0xC3, RawFrm, (outs), (ins variable_ops),
"ret",
[(X86retflag 0)], IIC_RET>;
+ def RETW : I <0xC3, RawFrm, (outs), (ins variable_ops),
+ "ret{w}",
+ [], IIC_RET>, OpSize;
def RETI : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
"ret\t$amt",
[(X86retflag timm:$amt)], IIC_RET_IMM>;
def RETIW : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
- "retw\t$amt",
+ "ret{w}\t$amt",
[], IIC_RET_IMM>, OpSize;
def LRETL : I <0xCB, RawFrm, (outs), (ins),
- "lretl", [], IIC_RET>;
+ "{l}ret{l|f}", [], IIC_RET>;
+ def LRETW : I <0xCB, RawFrm, (outs), (ins),
+ "{l}ret{w|f}", [], IIC_RET>, OpSize;
def LRETQ : RI <0xCB, RawFrm, (outs), (ins),
- "lretq", [], IIC_RET>;
+ "{l}ret{q|f}", [], IIC_RET>;
def LRETI : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
- "lret\t$amt", [], IIC_RET>;
+ "{l}ret{l|f}\t$amt", [], IIC_RET>;
def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
- "lretw\t$amt", [], IIC_RET>, OpSize;
+ "{l}ret{w|f}\t$amt", [], IIC_RET>, OpSize;
}
// Unconditional branches.
diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt
index e2883c767f..3391e45cc0 100644
--- a/test/MC/Disassembler/X86/intel-syntax.txt
+++ b/test/MC/Disassembler/X86/intel-syntax.txt
@@ -99,3 +99,9 @@
# CHECK: iretq
0x48 0xcf
+# CHECK: ret
+0x66 0xc3
+
+# CHECK: retf
+0x66 0xcb
+
diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s
index 8891126475..03b0551164 100644
--- a/test/MC/X86/intel-syntax-encoding.s
+++ b/test/MC/X86/intel-syntax-encoding.s
@@ -42,3 +42,16 @@ LBB0_3:
// CHECK: encoding: [0x0f,0xc2,0xd1,0x01]
cmpltps XMM2, XMM1
+
+// CHECK: encoding: [0xc3]
+ ret
+
+// CHECK: encoding: [0xcb]
+ retf
+
+// CHECK: encoding: [0xc2,0x08,0x00]
+ ret 8
+
+// CHECK: encoding: [0xca,0x08,0x00]
+ retf 8
+
diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 8e11aec5c5..57a00378d3 100644
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -990,3 +990,11 @@ xchgl %ecx, %eax
// CHECK: xchgl %ecx, %eax
// CHECK: encoding: [0x91]
xchgl %eax, %ecx
+
+// CHECK: retw
+// CHECK: encoding: [0x66,0xc3]
+retw
+
+// CHECK: lretw
+// CHECK: encoding: [0x66,0xcb]
+lretw
diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index f53b6726f4..6a2d5bba6b 100644
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -50,6 +50,9 @@
// CHECK: ret
ret
+// CHECK: retw
+ retw
+
// FIXME: Check that this matches SUB32ri8
// CHECK: subl $1, %eax
subl $1, %eax
@@ -841,6 +844,7 @@ iretq
lretq // CHECK: lretq # encoding: [0x48,0xcb]
lretl // CHECK: lretl # encoding: [0xcb]
lret // CHECK: lretl # encoding: [0xcb]
+lretw // CHECK: lretw # encoding: [0x66,0xcb]
// rdar://8403907
sysret