diff options
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 7 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2009-11-13-STRDBug.ll | 20 |
2 files changed, 27 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 873a8d3cfe..304d0ef662 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -866,6 +866,13 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB, BaseReg, BaseKill, BaseUndef, OffReg, OffKill, OffUndef, Pred, PredReg, TII, isT2); } else { + if (OddReg == EvenReg && EvenDeadKill) { + // If the two source operands are the same, the kill marker is probably + // on the first one. e.g. + // t2STRDi8 %R5<kill>, %R5, %R9<kill>, 0, 14, %reg0 + EvenDeadKill = false; + OddDeadKill = true; + } InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc, EvenReg, EvenDeadKill, EvenUndef, BaseReg, false, BaseUndef, OffReg, false, OffUndef, diff --git a/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll new file mode 100644 index 0000000000..8a67bb1958 --- /dev/null +++ b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 +; rdar://7394794 + +define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind { +entry: + %..i = select i1 false, i64 0, i64 0 ; <i64> [#uses=1] + br i1 undef, label %bb11.i, label %bb6.i + +bb6.i: ; preds = %entry + %0 = lshr i64 %h1, 0 ; <i64> [#uses=1] + store i64 %0, i64* %hv, align 4 + %1 = lshr i64 %l1, 0 ; <i64> [#uses=1] + %2 = or i64 0, %1 ; <i64> [#uses=1] + store i64 %2, i64* %lv, align 4 + br label %bb11.i + +bb11.i: ; preds = %bb6.i, %entry + store i64 %..i, i64* %lv, align 4 + ret void +} |