diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 35cf10a4c0..066fd191c9 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -874,17 +874,22 @@ bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDOperand &Base, if (!EnablePPCPreinc) return false; SDOperand Ptr; + MVT::ValueType VT; if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { Ptr = LD->getBasePtr(); + VT = LD->getValueType(0); } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { ST = ST; - //Ptr = ST->getBasePtr(); - //VT = ST->getStoredVT(); - // TODO: handle stores. - return false; + Ptr = ST->getBasePtr(); + VT = ST->getStoredVT(); + return false; // TODO: Stores. } else return false; + // PowerPC doesn't have preinc load/store instructions for vectors. + if (MVT::isVector(VT)) + return false; + // TODO: Handle reg+reg. if (!SelectAddressRegImm(Ptr, Offset, Base, DAG)) return false; |