diff options
| -rw-r--r-- | lib/Target/ARM/ARMNaClRewritePass.cpp | 25 |
1 files changed, 1 insertions, 24 deletions
diff --git a/lib/Target/ARM/ARMNaClRewritePass.cpp b/lib/Target/ARM/ARMNaClRewritePass.cpp index d38cc8886c..3a7e2f8d6a 100644 --- a/lib/Target/ARM/ARMNaClRewritePass.cpp +++ b/lib/Target/ARM/ARMNaClRewritePass.cpp @@ -656,29 +656,6 @@ bool ARMNaClRewritePass::SandboxMemoryReferencesInBlock( * barf when applied pre-emit, after allocation, so we must do it ourselves. */ - // LOCALMOD(pdox): Short-circuit this function. Assume CPSR is always live, - // until we figure out why the assert is tripping. - bool Modified2 = false; - for (MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); - MBBI != E; - ++MBBI) { - MachineInstr &MI = *MBBI; - int AddrIdx; - - if (FlagSfiLoad && IsDangerousLoad(MI, &AddrIdx)) { - bool CPSRLive = true; - SandboxMemory(MBB, MBBI, MI, AddrIdx, CPSRLive, true); - Modified2 = true; - } - if (FlagSfiStore && IsDangerousStore(MI, &AddrIdx)) { - bool CPSRLive = true; - SandboxMemory(MBB, MBBI, MI, AddrIdx, CPSRLive, false); - Modified2 = true; - } - } - return Modified2; - // END LOCALMOD(pdox) - bool CPSRLive = IsCPSRLiveOut(MBB); // Given that, record which instructions should not be altered to trash CPSR: @@ -696,7 +673,7 @@ bool ARMNaClRewritePass::SandboxMemoryReferencesInBlock( if (CPSRLive) InstrsWhereCPSRLives.insert(&MI); } - // Sanity check: + // Sanity check: recomputing live in here should agree with LLVM. assert(CPSRLive == MBB.isLiveIn(ARM::CPSR) && "CPSR Liveness analysis does not match cached live-in result."); |