diff options
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 5 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt | 4 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt | 4 |
3 files changed, 10 insertions, 3 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index f7afac64af..325cffb0fe 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -18,6 +18,7 @@ #include "ARMDisassembler.h" #include "ARMDisassemblerCore.h" +#include "llvm/ADT/OwningPtr.h" #include "llvm/MC/EDInstInfo.h" #include "llvm/MC/MCInst.h" #include "llvm/Target/TargetRegistry.h" @@ -384,15 +385,13 @@ bool ARMDisassembler::getInstruction(MCInst &MI, showBitVector(errs(), insn); }); - ARMBasicMCBuilder *Builder = CreateMCBuilder(Opcode, Format); + OwningPtr<ARMBasicMCBuilder> Builder(CreateMCBuilder(Opcode, Format)); if (!Builder) return false; if (!Builder->Build(MI, insn)) return false; - delete Builder; - return true; } diff --git a/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt new file mode 100644 index 0000000000..5202217b6a --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} + +# invalid (imod, M, iflags) combination +0x93 0x1c 0x02 0xf1 diff --git a/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt b/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt new file mode 100644 index 0000000000..f57ddbcafd --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-VLDMSDB-arm.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} + +# core registers out of range +0xa5 0xba 0x52 0xed |