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-rw-r--r--include/llvm/Target/TargetJITInfo.h19
-rw-r--r--lib/Target/X86/X86.h1
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp31
-rw-r--r--lib/Target/X86/X86JITInfo.cpp25
-rw-r--r--lib/Target/X86/X86NaClRewriteFinalPass.cpp229
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp7
6 files changed, 2 insertions, 310 deletions
diff --git a/include/llvm/Target/TargetJITInfo.h b/include/llvm/Target/TargetJITInfo.h
index f46c956ea0..f9bd0fb9f9 100644
--- a/include/llvm/Target/TargetJITInfo.h
+++ b/include/llvm/Target/TargetJITInfo.h
@@ -129,25 +129,6 @@ namespace llvm {
/// separately allocated heap memory rather than in the same
/// code memory allocated by JITCodeEmitter.
virtual bool allocateSeparateGVMemory() const { return false; }
-
- // @LOCALMOD-START
- // NaCl-specific, target-specific stuff
- typedef struct { uint8_t *ins; int len; } HaltInstruction;
- /// Get a sequence of NOPs of length len. Returns a pointer to a buffer
- /// containing a val
- virtual const uint8_t *getNopSequence(size_t len) const { return NULL; }
- /// Get the length and definition of the halt/roadblock instruction
- virtual const HaltInstruction *getHalt() const { return NULL; }
- virtual int getBundleSize() const { return 0; }
- virtual int32_t getJumpMask() const { return 0; }
-
- /// Relocations cannot happen in-place in NaCl because we can't write to
- /// code. This function takes a pointer to where the code has been emitted,
- /// before it is copied to the code region. The subsequent call to
- /// relocate takes pointers to the target code location, but rewrites the
- /// code in the relocation buffer rather than at the target
- virtual void setRelocationBuffer(unsigned char * BufferBegin) {}
- // @LOCALMOD-END
protected:
bool useGOT;
};
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 8813aa836a..d4f7618de0 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -49,7 +49,6 @@ FunctionPass *createX86FloatingPointStackifierPass();
// @LOCALMOD-BEGIN - Creates a pass to make instructions follow NaCl SFI rules.
FunctionPass* createX86NaClRewritePass();
-FunctionPass* createX86NaClRewriteFinalPass();
// @LOCALMOD-END
/// createX86IssueVZeroUpperPass - This pass inserts AVX vzeroupper instructions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 0a0a4c3f4d..bc77334347 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -12,7 +12,7 @@
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "jit"
+#define DEBUG_TYPE "x86-emitter"
#include "X86.h"
#include "X86InstrInfo.h"
#include "X86JITInfo.h"
@@ -34,7 +34,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
-#include "llvm/Target/TargetOpcodes.h" // @LOCALMOD
using namespace llvm;
STATISTIC(NumEmitted, "Number of machine instructions emitted");
@@ -1121,28 +1120,6 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
unsigned Opcode = Desc->Opcode;
- // @LOCALMOD-START
- if (TM.getSubtargetImpl()->isTargetNaCl()) {
- switch (Opcode) {
- case TargetOpcode::BUNDLE_LOCK:
- MCE.beginBundleLock();
- return;
- case TargetOpcode::BUNDLE_UNLOCK:
- MCE.endBundleLock();
- return;
- case TargetOpcode::BUNDLE_ALIGN_START:
- MCE.alignToBundleBeginning();
- return;
- case TargetOpcode::BUNDLE_ALIGN_END:
- MCE.alignToBundleEnd();
- return;
- }
- // In addition to groups of instructions, each instruction must itself be
- // bundle-locked because they are emitted with multiple calls into MCE
- MCE.beginBundleLock();
- }
- // @LOCALMOD-END
-
// If this is a two-address instruction, skip one of the register operands.
unsigned NumOps = Desc->getNumOperands();
unsigned CurOp = 0;
@@ -1502,11 +1479,5 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
llvm_unreachable(0);
}
- // @LOCALMOD-START
- if (TM.getSubtargetImpl()->isTargetNaCl()) {
- MCE.endBundleLock();
- }
- // @LOCALMOD-END
-
MCE.processDebugLoc(MI.getDebugLoc(), false);
}
diff --git a/lib/Target/X86/X86JITInfo.cpp b/lib/Target/X86/X86JITInfo.cpp
index 066830c845..cca391f647 100644
--- a/lib/Target/X86/X86JITInfo.cpp
+++ b/lib/Target/X86/X86JITInfo.cpp
@@ -18,8 +18,6 @@
#include "X86TargetMachine.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/Compiler.h"
-#include "llvm/Support/Debug.h"//TODO(dschuff):don't forget to remove these
-#include "llvm/Support/Disassembler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Valgrind.h"
#include <cstdlib>
@@ -84,7 +82,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction;
// Provide a wrapper for X86CompilationCallback2 that saves non-traditional
// callee saved registers, for the fastcc calling convention.
extern "C" {
-#if defined(X86_64_JIT) && !defined(__native_client__)
+#if defined(X86_64_JIT)
# ifndef _MSC_VER
// No need to save EAX/EDX for X86-64.
void X86CompilationCallback(void);
@@ -232,11 +230,7 @@ extern "C" {
"popl %ebp\n"
CFI(".cfi_adjust_cfa_offset -4\n")
CFI(".cfi_restore %ebp\n")
-#if defined(__native_client__) // @LOCALMOD-BEGIN
- "popl %ecx; nacljmp %ecx\n"
-#else
"ret\n"
-#endif // @LOCALMOD-END
CFI(".cfi_endproc\n")
SIZE(X86CompilationCallback)
);
@@ -301,11 +295,7 @@ extern "C" {
"popl %ebp\n"
CFI(".cfi_adjust_cfa_offset -4\n")
CFI(".cfi_restore %ebp\n")
-#if defined(__native_client__) // @LOCALMOD-BEGIN
- "popl %ecx; nacljmp %ecx\n"
-#else
"ret\n"
-#endif // @LOCALMOD-END
CFI(".cfi_endproc\n")
SIZE(X86CompilationCallback_SSE)
);
@@ -479,14 +469,7 @@ TargetJITInfo::StubLayout X86JITInfo::getStubLayout() {
// The 32-bit stub contains a 5-byte call|jmp.
// If the stub is a call to the compilation callback, an extra byte is added
// to mark it as a stub.
-#ifdef __native_client__
- // NaCl call targets must be bundle-aligned. In the case of stubs with
- // CALLs, the calls do not need to be aligned to the end of the bundle
- // because there is no return
- StubLayout Result = {32, 32};//TODO(dschuff): use named constant here
-#else
StubLayout Result = {14, 4};
-#endif
return Result;
}
@@ -515,9 +498,6 @@ void *X86JITInfo::emitFunctionStub(const Function* F, void *Target,
JCE.emitByte(0xE9);
JCE.emitWordLE((intptr_t)Target-JCE.getCurrentPCValue()-4);
#endif
- DEBUG(dbgs() <<"emitted stub: "<< sys::disassembleBuffer(
- (uint8_t *)Result,JCE.getCurrentPCValue()-(uintptr_t)Result,
- (intptr_t)Result));
return Result;
}
@@ -539,9 +519,6 @@ void *X86JITInfo::emitFunctionStub(const Function* F, void *Target,
// initialize the buffer with garbage, which means it may follow a
// noreturn function call, confusing X86CompilationCallback2. PR 4929.
JCE.emitByte(0xCE); // Interrupt - Just a marker identifying the stub!
- DEBUG(dbgs() <<"emitted stub: "<< sys::disassembleBuffer(
- (uint8_t *)Result,JCE.getCurrentPCValue()-(uintptr_t)Result,
- (intptr_t)Result));
return Result;
}
diff --git a/lib/Target/X86/X86NaClRewriteFinalPass.cpp b/lib/Target/X86/X86NaClRewriteFinalPass.cpp
deleted file mode 100644
index 0305a336e2..0000000000
--- a/lib/Target/X86/X86NaClRewriteFinalPass.cpp
+++ /dev/null
@@ -1,229 +0,0 @@
-//=== X86NaClRewriteFinalPass.cpp - Expand NaCl pseudo-instructions --*- C++ -*-=//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// This pass expands NaCl pseudo-instructions into real instructions.
-// This duplicates much of the functionality found in X86MCNaCl.cpp but is
-// needed for non-MC JIT, which doesn't use MC. It expands pseudo instructions
-// into bundle-locked groups by emitting a BUNDLE_LOCK marker,
-// followed by the instructions, followed by a BUNDLE_UNLOCK marker.
-// The Code Emitter needs to ensure the alignment as it emits. Additionallly,
-// this pass needs to be run last, or the user at least needs to ensure that
-// subsequent passes do not reorder or remove any bundled groups.
-//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "x86-jit-sandboxing"
-#include "X86.h"
-#include "X86InstrInfo.h"
-#include "X86Subtarget.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/IR/Function.h"
-
-using namespace llvm;
-
-extern cl::opt<int> FlagSfiX86JmpMask;
-
-namespace {
- class X86NaClRewriteFinalPass : public MachineFunctionPass {
- public:
- static char ID;
- X86NaClRewriteFinalPass() : MachineFunctionPass(ID),
- kJumpMask(FlagSfiX86JmpMask) {}
-
- virtual bool runOnMachineFunction(MachineFunction &Fn);
-
- virtual const char *getPassName() const {
- return "NaCl Pseudo-instruction expansion";
- }
-
- private:
- const int kJumpMask;
- const TargetMachine *TM;
- const TargetInstrInfo *TII;
- const TargetRegisterInfo *TRI;
- bool Is64Bit;
-
- bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
-
- void TraceLog(const char *fun,
- const MachineBasicBlock &MBB,
- const MachineBasicBlock::iterator MBBI) const;
-
- void RewriteIndirectJump(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- bool Is64Bit,
- bool IsCall);
- void RewriteDirectCall(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- bool Is64Bit);
- bool ApplyCommonRewrites(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI);
-
- };
-
- char X86NaClRewriteFinalPass::ID = 0;
-}
-
-void X86NaClRewriteFinalPass::RewriteIndirectJump(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- bool Is64Bit,
- bool IsCall) {
- MachineInstr &MI = *MBBI;
- DebugLoc DL = MI.getDebugLoc();
-
- DEBUG(dbgs() << "rewrite indirect jump " << MBB);
-
- unsigned reg32 = MI.getOperand(0).getReg();
- unsigned reg64 = getX86SubSuperRegister(reg32, MVT::i64);
-
- if (IsCall)
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::BUNDLE_ALIGN_END));
-
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::BUNDLE_LOCK));
-
- BuildMI(MBB, MBBI, DL, TII->get(X86::AND32ri8))
- .addReg(reg32)
- .addReg(reg32)
- //.addOperand(MI.getOperand(0))//correct flags, but might be 64bit reg
- .addImm(kJumpMask);
-
- if (Is64Bit) {
- BuildMI(MBB, MBBI, DL, TII->get(X86::ADD64rr))
- .addReg(reg64)
- .addReg(reg64)
- .addReg(X86::R15);
- }
-
- if (IsCall) {
- BuildMI(MBB, MBBI, DL, TII->get(Is64Bit ? X86::CALL64r : X86::CALL32r))
- .addReg(Is64Bit ? reg64 : reg32);
- } else {
- BuildMI(MBB, MBBI, DL, TII->get(Is64Bit ? X86::JMP64r : X86::JMP32r))
- .addReg(Is64Bit ? reg64 : reg32);
- }
-
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::BUNDLE_UNLOCK));
- MI.eraseFromParent();
-
- DEBUG(dbgs() << "done rewrite indirect jump " << MBB);
-}
-
-void X86NaClRewriteFinalPass::RewriteDirectCall(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- bool Is64Bit) {
- MachineInstr &MI = *MBBI;
- DebugLoc DL = MI.getDebugLoc();
- DEBUG(dbgs() << "rewrite direct call " << MBB);
- const MachineOperand &MO = MI.getOperand(0);
- // rewrite calls to immediates as indirect calls.
- if (MO.isImm()) {
- DEBUG(dbgs() << " is immediate " << MO);
- // First, rewrite as a move imm->reg + indirect call sequence,
- BuildMI(MBB, MBBI, DL, TII->get(X86::MOV32ri))
- .addReg(X86::ECX)
- .addOperand(MO);
- BuildMI(MBB, MBBI, DL, TII->get(Is64Bit ? X86::CALL64r : X86::CALL32r))
- .addReg(X86::ECX);
- // Then use RewriteIndirectJump to sandbox it
- MachineBasicBlock::iterator I = MBBI;
- --I; // I now points at the call instruction
- MI.eraseFromParent();
- return RewriteIndirectJump(MBB, I, Is64Bit, true);
- }
-
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::BUNDLE_ALIGN_END));
-
- BuildMI(MBB, MBBI, DL,
- TII->get(Is64Bit ? X86::CALL64pcrel32 : X86::CALLpcrel32))
- .addOperand(MI.getOperand(0));
-
- MI.eraseFromParent();
-}
-
-bool X86NaClRewriteFinalPass::ApplyCommonRewrites(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI) {
- MachineInstr &MI = *MBBI;
- unsigned Opcode = MI.getOpcode();
- switch(Opcode) {
- case X86::NACL_CALL32d:
- RewriteDirectCall(MBB, MBBI, false);
- break;
- case X86::NACL_CALL64d:
- RewriteDirectCall(MBB, MBBI, true);
- break;
- case X86::NACL_CALL32r:
- RewriteIndirectJump(MBB, MBBI, false, true);
- return true;
- case X86::NACL_CALL64r:
- RewriteIndirectJump(MBB, MBBI, true, true);
- return true;
- case X86::NACL_JMP32r:
- RewriteIndirectJump(MBB, MBBI, false, false);
- return true;
- case X86::NACL_JMP64r:
- RewriteIndirectJump(MBB, MBBI, true, false);
- return true;
- case X86::NACL_TRAP32:
- case X86::NACL_TRAP64:
- case X86::NACL_ASPi8:
- case X86::NACL_ASPi32:
- case X86::NACL_SSPi8:
- case X86::NACL_SSPi32:
- case X86::NACL_SPADJi32:
- case X86::NACL_RESTBPm:
- case X86::NACL_RESTBPr:
- case X86::NACL_RESTSPm:
- case X86::NACL_RESTSPr:
- assert(false && "NaCl Pseudo-inst not handled");
- case X86::NACL_RET32:
- case X86::NACL_RET64:
- case X86::NACL_RETI32:
- assert(false && "Should not get RETs here");
- }
- return false;
-}
-
-bool X86NaClRewriteFinalPass::runOnMachineFunction(MachineFunction &MF) {
- bool modified = false;
- TM = &MF.getTarget();
- TII = TM->getInstrInfo();
- TRI = TM->getRegisterInfo();
- const X86Subtarget *subtarget = &TM->getSubtarget<X86Subtarget>();
- assert(subtarget->isTargetNaCl() && "Target in NaClRewriteFinal is not NaCl");
-
- DEBUG(dbgs() << "*************** NaCl Rewrite Final ***************\n");
-
- for (MachineFunction::iterator MFI = MF.begin(), E = MF.end();
- MFI != E; ++MFI) {
- modified |= runOnMachineBasicBlock(*MFI);
- }
-
- DEBUG(dbgs() << "************* NaCl Rewrite Final Done *************\n");
- return modified;
-}
-
-bool X86NaClRewriteFinalPass::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
- bool modified = false;
- for (MachineBasicBlock::iterator MBBI = MBB.begin(), NextMBBI = MBBI;
- MBBI != MBB.end(); MBBI = NextMBBI) {
- ++NextMBBI;
- if (ApplyCommonRewrites(MBB, MBBI)) {
- modified = true;
- }
- }
- return modified;
-}
-
-// return an instance of the pass
-namespace llvm {
- FunctionPass *createX86NaClRewriteFinalPass() {
- return new X86NaClRewriteFinalPass();
- }
-}
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index c293bce4f5..742a33bda1 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -225,13 +225,6 @@ bool X86PassConfig::addPreEmitPass() {
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
JITCodeEmitter &JCE) {
- // @LOCALMOD-START
- // Add this pass here instead of as a PreEmitPass because this function is
- // only called in JIT mode
- if (Subtarget.isTargetNaCl()) {
- PM.add(createX86NaClRewriteFinalPass());
- }
- // @LOCALMOD-END
PM.add(createX86JITCodeEmitterPass(*this, JCE));
return false;
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-09-25 14:56:51 +0000