diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/X86/add.ll | 12 |
2 files changed, 21 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e4f3027053..7de66f6e90 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1443,6 +1443,15 @@ SDValue DAGCombiner::visitADD(SDNode *N) { } } + // add (sext i1), X -> sub X, (zext i1) + if (N0.getOpcode() == ISD::SIGN_EXTEND && + N0.getOperand(0).getValueType() == MVT::i1 && + !TLI.isOperationLegal(ISD::SIGN_EXTEND, MVT::i1)) { + DebugLoc DL = N->getDebugLoc(); + SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)); + return DAG.getNode(ISD::SUB, DL, VT, N1, ZExt); + } + return SDValue(); } diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index d6e99ee1a7..3ec5358aff 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -120,3 +120,15 @@ entry: ; X64: addq ; X64-NEXT: sbbq ; X64-NEXT: testb + +define i32 @test9(i32 %x, i32 %y) nounwind readnone { + %cmp = icmp eq i32 %x, 10 + %sub = sext i1 %cmp to i32 + %cond = add i32 %sub, %y + ret i32 %cond +; X64: test9: +; X64: cmpl $10 +; X64: sete +; X64: subl +; X64: ret +} |