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-rw-r--r--include/llvm/CodeGen/ISDOpcodes.h1
-rw-r--r--include/llvm/Intrinsics.td2
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp5
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp1
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp10
-rw-r--r--lib/Target/ARM/ARMISelLowering.h1
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp8
-rw-r--r--lib/Target/Mips/MipsISelLowering.h1
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp10
-rw-r--r--lib/Target/X86/X86ISelLowering.h1
10 files changed, 0 insertions, 40 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h
index 68fcb3e17b..2d8181cf6a 100644
--- a/include/llvm/CodeGen/ISDOpcodes.h
+++ b/include/llvm/CodeGen/ISDOpcodes.h
@@ -641,7 +641,6 @@ namespace ISD {
// NACL_* - Native Client instrinsics.
// These correspond to functions in:
// native_client/src/untrusted/nacl/tls_params.h
- NACL_TP_ALIGN,
NACL_TP_TLS_OFFSET,
NACL_TP_TDB_OFFSET,
// Expands to the target architecture enumeration value.
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index e9a4e3aaaf..116d80586c 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -465,8 +465,6 @@ def int_nacl_longjmp : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty]>,
// the interface in native_client/src/untrusted/nacl/tls_params.h.
// The intrinsic names are basically the functions there without the
// leading underscores.
-def int_nacl_tp_alignment : Intrinsic<[llvm_i32_ty], []>,
- GCCBuiltin<"__builtin_nacl_tp_alignment">;
def int_nacl_tp_tls_offset : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>,
GCCBuiltin<"__builtin_nacl_tp_tls_offset">;
def int_nacl_tp_tdb_offset : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>,
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 2783664e53..c814086473 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5195,11 +5195,6 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
return 0;
// @LOCALMOD-BEGIN
// Native Client Intrinsics for TLS setup / layout.
- case Intrinsic::nacl_tp_alignment: {
- EVT DestVT = TLI.getValueType(I.getType());
- setValue(&I, DAG.getNode(ISD::NACL_TP_ALIGN, dl, DestVT));
- return 0;
- }
case Intrinsic::nacl_tp_tls_offset: {
SDValue tls_size = getValue(I.getArgOperand(0));
setValue(&I, DAG.getNode(ISD::NACL_TP_TLS_OFFSET, dl,
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index b6f2ff410d..66f87b4ba0 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -314,7 +314,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
// @LOCALMOD-BEGIN
// NaCl intrinsics for TLS setup
- case ISD::NACL_TP_ALIGN: return "nacl_tp_alignment";
case ISD::NACL_TP_TLS_OFFSET: return "nacl_tls_offset";
case ISD::NACL_TP_TDB_OFFSET: return "nacl_tdb_offset";
case ISD::NACL_TARGET_ARCH: return "nacl_target_arch";
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index bd00f4b7ef..b8cbc9c980 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -816,7 +816,6 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
// @LOCALMOD-BEGIN
if (Subtarget->isTargetNaCl()) {
- setOperationAction(ISD::NACL_TP_ALIGN, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TLS_OFFSET, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TDB_OFFSET, MVT::i32, Custom);
setOperationAction(ISD::NACL_TARGET_ARCH, MVT::i32, Custom);
@@ -2156,14 +2155,6 @@ SDValue ARMTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
//////////////////////////////////////////////////////////////////////
// NaCl TLS setup / layout intrinsics.
// See: native_client/src/untrusted/stubs/tls_params.h
-SDValue ARMTargetLowering::LowerNaClTpAlign(SDValue Op,
- SelectionDAG &DAG) const {
- // size_t __nacl_tp_alignment () {
- // return 4;
- // }
- return DAG.getConstant(4, Op.getValueType().getSimpleVT());
-}
-
SDValue ARMTargetLowering::LowerNaClTpTlsOffset(SDValue Op,
SelectionDAG &DAG) const {
// ssize_t __nacl_tp_tls_offset (size_t tls_size) {
@@ -5494,7 +5485,6 @@ SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
case ISD::ATOMIC_LOAD:
case ISD::ATOMIC_STORE: return LowerAtomicLoadStore(Op, DAG);
// @LOCALMOD-BEGIN
- case ISD::NACL_TP_ALIGN: return LowerNaClTpAlign(Op, DAG);
case ISD::NACL_TP_TLS_OFFSET: return LowerNaClTpTlsOffset(Op, DAG);
case ISD::NACL_TP_TDB_OFFSET: return LowerNaClTpTdbOffset(Op, DAG);
case ISD::NACL_TARGET_ARCH: return LowerNaClTargetArch(Op, DAG);
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 2cf26ba1af..81b1d0323b 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -432,7 +432,6 @@ namespace llvm {
// @LOCALMOD-START
SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerNaClTpAlign(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTlsOffset(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTdbOffset(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTargetArch(SDValue Op, SelectionDAG &DAG) const;
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 1a656c97d8..7e9ae7dfba 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -289,7 +289,6 @@ MipsTargetLowering(MipsTargetMachine &TM)
// @LOCALMOD-BEGIN
if (Subtarget->isTargetNaCl()) {
- setOperationAction(ISD::NACL_TP_ALIGN, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TLS_OFFSET, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TDB_OFFSET, MVT::i32, Custom);
}
@@ -821,7 +820,6 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const
case ISD::STORE: return LowerSTORE(Op, DAG);
// @LOCALMOD-BEGIN
- case ISD::NACL_TP_ALIGN: return LowerNaClTpAlign(Op, DAG);
case ISD::NACL_TP_TLS_OFFSET: return LowerNaClTpTlsOffset(Op, DAG);
case ISD::NACL_TP_TDB_OFFSET: return LowerNaClTpTdbOffset(Op, DAG);
// @LOCALMOD-END
@@ -1658,12 +1656,6 @@ SDValue MipsTargetLowering::LowerBlockAddress(SDValue Op,
// NaCl TLS setup / layout intrinsics.
// See: native_client/src/untrusted/nacl/tls_params.h
-
-SDValue MipsTargetLowering::LowerNaClTpAlign(SDValue Op,
- SelectionDAG &DAG) const {
- return DAG.getConstant(4, Op.getValueType().getSimpleVT());
-}
-
SDValue MipsTargetLowering::LowerNaClTpTlsOffset(SDValue Op,
SelectionDAG &DAG) const {
return DAG.getConstant(0, Op.getValueType().getSimpleVT());
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h
index e23752c62a..d9f8ddc89b 100644
--- a/lib/Target/Mips/MipsISelLowering.h
+++ b/lib/Target/Mips/MipsISelLowering.h
@@ -153,7 +153,6 @@ namespace llvm {
SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
// @LOCALMOD-BEGIN
- SDValue LowerNaClTpAlign(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTlsOffset(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTdbOffset(SDValue Op, SelectionDAG &DAG) const;
// @LOCALMOD-END
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 294a4ed1f3..126dd4bfe0 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1238,7 +1238,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
// @LOCALMOD-BEGIN
if (Subtarget->isTargetNaCl()) {
- setOperationAction(ISD::NACL_TP_ALIGN, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TLS_OFFSET, MVT::i32, Custom);
setOperationAction(ISD::NACL_TP_TDB_OFFSET, MVT::i32, Custom);
setOperationAction(ISD::NACL_TARGET_ARCH, MVT::i32, Custom);
@@ -9623,14 +9622,6 @@ SDValue X86TargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
//////////////////////////////////////////////////////////////////////
// NaCl TLS setup / layout intrinsics.
// See: native_client/src/untrusted/stubs/tls_params.h
-SDValue X86TargetLowering::LowerNaClTpAlign(SDValue Op,
- SelectionDAG &DAG) const {
- // size_t __nacl_tp_alignment () {
- // return 64;
- // }
- return DAG.getConstant(64, Op.getValueType().getSimpleVT());
-}
-
SDValue X86TargetLowering::LowerNaClTpTlsOffset(SDValue Op,
SelectionDAG &DAG) const {
// ssize_t __nacl_tp_tls_offset (size_t tls_size) {
@@ -11392,7 +11383,6 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
case ISD::ADD: return LowerADD(Op, DAG);
case ISD::SUB: return LowerSUB(Op, DAG);
// @LOCALMOD-BEGIN
- case ISD::NACL_TP_ALIGN: return LowerNaClTpAlign(Op, DAG);
case ISD::NACL_TP_TLS_OFFSET: return LowerNaClTpTlsOffset(Op, DAG);
case ISD::NACL_TP_TDB_OFFSET: return LowerNaClTpTdbOffset(Op, DAG);
case ISD::NACL_TARGET_ARCH: return LowerNaClTargetArch(Op, DAG);
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index e5bbf15cdf..4f2b491f4b 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -838,7 +838,6 @@ namespace llvm {
SDValue PerformTruncateCombine(SDNode* N, SelectionDAG &DAG, DAGCombinerInfo &DCI) const;
// @LOCALMOD-BEGIN
- SDValue LowerNaClTpAlign(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTlsOffset(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTpTdbOffset(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerNaClTargetArch(SDValue Op, SelectionDAG &DAG) const;
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-04-26 17:28:41 +0000