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-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td11
-rw-r--r--test/CodeGen/Thumb2/thumb2-lsr3.ll19
2 files changed, 29 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 1126be4422..2affa6389c 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -715,9 +715,18 @@ defm t2ASR : T2I_sh_ir<"asr", BinOpFrag<(sra node:$LHS, node:$RHS)>>;
defm t2ROR : T2I_sh_ir<"ror", BinOpFrag<(rotr node:$LHS, node:$RHS)>>;
def t2MOVrx : T2sI<(outs GPR:$dst), (ins GPR:$src),
- "mov", " $dst, $src, rrx",
+ "rrx", " $dst, $src",
[(set GPR:$dst, (ARMrrx GPR:$src))]>;
+let Defs = [CPSR] in {
+def t2MOVsrl_flag : T2XI<(outs GPR:$dst), (ins GPR:$src),
+ "lsrs.w $dst, $src, #1",
+ [(set GPR:$dst, (ARMsrl_flag GPR:$src))]>;
+def t2MOVsra_flag : T2XI<(outs GPR:$dst), (ins GPR:$src),
+ "asrs.w $dst, $src, #1",
+ [(set GPR:$dst, (ARMsra_flag GPR:$src))]>;
+}
+
//===----------------------------------------------------------------------===//
// Bitwise Instructions.
//
diff --git a/test/CodeGen/Thumb2/thumb2-lsr3.ll b/test/CodeGen/Thumb2/thumb2-lsr3.ll
new file mode 100644
index 0000000000..9bc4b5b7c5
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-lsr3.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2
+
+define i1 @test1(i64 %poscnt, i32 %work) {
+entry:
+; CHECK: rrx r0, r0
+; CHECK: lsrs.w r1, r1, #1
+ %0 = lshr i64 %poscnt, 1
+ %1 = icmp eq i64 %0, 0
+ ret i1 %1
+}
+
+define i1 @test2(i64 %poscnt, i32 %work) {
+entry:
+; CHECK: rrx r0, r0
+; CHECK: asrs.w r1, r1, #1
+ %0 = ashr i64 %poscnt, 1
+ %1 = icmp eq i64 %0, 0
+ ret i1 %1
+}