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-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp8
-rw-r--r--test/MC/Disassembler/ARM/neon.txt4
2 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index ebcb798969..725a8a2abd 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1992,7 +1992,7 @@ static DecodeStatus DecodeVLD1DupInstruction(llvm::MCInst &Inst, unsigned Insn,
if (regs == 2) {
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder));
}
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2023,7 +2023,7 @@ static DecodeStatus DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn,
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2052,7 +2052,7 @@ static DecodeStatus DecodeVLD3DupInstruction(llvm::MCInst &Inst, unsigned Insn,
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2097,7 +2097,7 @@ static DecodeStatus DecodeVLD4DupInstruction(llvm::MCInst &Inst, unsigned Insn,
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt
index d9482d7006..b909c4bb4b 100644
--- a/test/MC/Disassembler/ARM/neon.txt
+++ b/test/MC/Disassembler/ARM/neon.txt
@@ -1845,3 +1845,7 @@
# CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
0x4f 0x1b 0xc0 0xf4
# CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
+
+0x0 0xc 0xa0 0xf4
+# CHECK: vld1.8 {d0[]}, [r0], r0
+