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-rw-r--r--lib/CodeGen/AsmPrinter/DwarfDebug.cpp2
-rw-r--r--lib/Target/ARM/ARMAsmPrinter.cpp2
-rw-r--r--lib/Target/ARM/ARMTargetObjectFile.cpp2
-rw-r--r--lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp10
-rw-r--r--lib/Target/Mips/MipsDelaySlotFiller.cpp2
-rw-r--r--lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp6
6 files changed, 10 insertions, 14 deletions
diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 15fb9cb5f2..1a9deb6641 100644
--- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -647,7 +647,7 @@ CompileUnit *DwarfDebug::constructCompileUnit(const MDNode *N) {
CompilationDir = DIUnit.getDirectory();
// @LOCALMOD-BEGIN
unsigned ID;
- if (Triple(Asm->TM.getTargetTriple()).getOS() == Triple::NativeClient) {
+ if (Triple(Asm->TM.getTargetTriple()).isOSNaCl()) {
ID = getOrCreateCompileUnitID(FN, CompilationDir, N);
} else {
ID = getOrCreateSourceID(FN, CompilationDir);
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index 50e01b33b2..6bad258bcb 100644
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -250,7 +250,7 @@ void NaclAlignAllJumpTargetsAndConstantPools(MachineFunction &MF) {
}
}
- // FIRST ENTRY IN A ConstanPool
+ // FIRST ENTRY IN A ConstantPool
bool last_bb_was_constant_pool = false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end();
I != E; ++I) {
diff --git a/lib/Target/ARM/ARMTargetObjectFile.cpp b/lib/Target/ARM/ARMTargetObjectFile.cpp
index 8d478a0137..ca57541726 100644
--- a/lib/Target/ARM/ARMTargetObjectFile.cpp
+++ b/lib/Target/ARM/ARMTargetObjectFile.cpp
@@ -53,7 +53,7 @@ getTTypeGlobalReference(const GlobalValue *GV, Mangler *Mang,
// @LOCALMOD-BEGIN
// FIXME: There has got to be a better way to get this info.
Triple T(MMI->getModule()->getTargetTriple());
- if (T.getOS() == Triple::NativeClient)
+ if (T.isOSNaCl())
return TargetLoweringObjectFileELF::getTTypeGlobalReference(GV, Mang,
MMI, Encoding, Streamer);
// @LOCALMOD-END
diff --git a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index f7e88b98f8..f253ef35d0 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -274,10 +274,9 @@ MCAsmBackend *llvm::createMipsAsmBackendEL32(const Target &T, StringRef TT,
// @LOCALMOD-BEGIN
if (Triple(TT).isOSNaCl())
return new NaClMipsAsmBackend(T, /*Is64Bit*/false);
- else
- return new MipsAsmBackend(T, Triple(TT).getOS(),
- /*IsLittle*/true, /*Is64Bit*/false);
// @LOCALMOD-END
+ return new MipsAsmBackend(T, Triple(TT).getOS(),
+ /*IsLittle*/true, /*Is64Bit*/false);
}
MCAsmBackend *llvm::createMipsAsmBackendEB32(const Target &T, StringRef TT,
@@ -291,10 +290,9 @@ MCAsmBackend *llvm::createMipsAsmBackendEL64(const Target &T, StringRef TT,
// @LOCALMOD-BEGIN
if (Triple(TT).isOSNaCl())
return new NaClMipsAsmBackend(T, /*Is64Bit*/true);
- else
- return new MipsAsmBackend(T, Triple(TT).getOS(),
- /*IsLittle*/true, /*Is64Bit*/true);
// @LOCALMOD-END
+ return new MipsAsmBackend(T, Triple(TT).getOS(),
+ /*IsLittle*/true, /*Is64Bit*/true);
}
MCAsmBackend *llvm::createMipsAsmBackendEB64(const Target &T, StringRef TT,
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 8fc5d53741..65f2f3c445 100644
--- a/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -173,7 +173,7 @@ bool Filler::findDelayInstr(MachineBasicBlock &MBB,
|| I->isPseudo()
// @LOCALMOD-START
// Don't put in delay slot instructions that could be masked.
- || (Triple(TM.getTargetTriple()).getOS() == Triple::NativeClient &&
+ || (Triple(TM.getTargetTriple()).isOSNaCl() &&
(IsDangerousLoad(*FI, &Dummy)
|| IsDangerousStore(*FI, &Dummy)
|| FI->modifiesRegister(Mips::SP, TM.getRegisterInfo())
diff --git a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index c0bddc65c1..8346b3392d 100644
--- a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -490,9 +490,8 @@ MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T, StringRef TT, String
// @LOCALMOD-BEGIN
if (TheTriple.isOSNaCl())
return new NaClX86_32AsmBackend(T, OSABI, CPU);
- else
- return new ELFX86_32AsmBackend(T, OSABI, CPU);
// @LOCALMOD-END
+ return new ELFX86_32AsmBackend(T, OSABI, CPU);
}
MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU) {
@@ -508,7 +507,6 @@ MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T, StringRef TT, String
// @LOCALMOD-BEGIN
if (TheTriple.isOSNaCl())
return new NaClX86_64AsmBackend(T, OSABI, CPU);
- else
- return new ELFX86_64AsmBackend(T, OSABI, CPU);
// @LOCALMOD-END
+ return new ELFX86_64AsmBackend(T, OSABI, CPU);
}