diff options
| -rw-r--r-- | lib/CodeGen/RegAllocFast.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll | 15 |
2 files changed, 2 insertions, 15 deletions
diff --git a/lib/CodeGen/RegAllocFast.cpp b/lib/CodeGen/RegAllocFast.cpp index 30ecea0018..7bb849ef54 100644 --- a/lib/CodeGen/RegAllocFast.cpp +++ b/lib/CodeGen/RegAllocFast.cpp @@ -442,6 +442,8 @@ unsigned RAFast::calcSpillCost(unsigned PhysReg) const { unsigned Cost = 0; for (const unsigned *AS = TRI->getAliasSet(PhysReg); unsigned Alias = *AS; ++AS) { + if (UsedInInstr.test(Alias)) + return spillImpossible; switch (unsigned VirtReg = PhysRegState[Alias]) { case regDisabled: break; diff --git a/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll b/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll deleted file mode 100644 index eb23de0b97..0000000000 --- a/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast -; Previously we'd crash as out of registers on this input by clobbering all of -; the aliases. -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" -target triple = "thumbv7-apple-darwin10.0.0" - -define void @_Z8TestCasev() nounwind ssp { -entry: - %a = alloca float, align 4 - %tmp = load float* %a, align 4 - call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0 - ret void -} - -!0 = metadata !{i32 109} |