diff options
-rw-r--r-- | lib/Target/PowerPC/PPCFrameInfo.cpp | 25 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCFrameInfo.h | 1 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 5 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.td | 10 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll | 22 |
5 files changed, 51 insertions, 12 deletions
diff --git a/lib/Target/PowerPC/PPCFrameInfo.cpp b/lib/Target/PowerPC/PPCFrameInfo.cpp index 817b8f166a..918fb07f57 100644 --- a/lib/Target/PowerPC/PPCFrameInfo.cpp +++ b/lib/Target/PowerPC/PPCFrameInfo.cpp @@ -227,6 +227,17 @@ void PPCFrameInfo::determineFrameLayout(MachineFunction &MF) const { // pointer register. bool PPCFrameInfo::hasFP(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); + // FIXME: This is pretty much broken by design: hasFP() might be called really + // early, before the stack layout was calculated and thus hasFP() might return + // true or false here depending on the time of call. + return (MFI->getStackSize()) && needsFP(MF); +} + +// needsFP - Return true if the specified function should have a dedicated frame +// pointer register. This is true if the function has variable sized allocas or +// if frame pointer elimination is disabled. +bool PPCFrameInfo::needsFP(const MachineFunction &MF) const { + const MachineFrameInfo *MFI = MF.getFrameInfo(); // Naked functions have no stack frame pushed, so we don't have a frame // pointer. @@ -267,6 +278,8 @@ void PPCFrameInfo::emitPrologue(MachineFunction &MF) const { MBBI = MBB.begin(); // Work out frame sizes. + // FIXME: determineFrameLayout() may change the frame size. This should be + // moved upper, to some hook. determineFrameLayout(MF); unsigned FrameSize = MFI->getStackSize(); @@ -280,7 +293,7 @@ void PPCFrameInfo::emitPrologue(MachineFunction &MF) const { PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); bool MustSaveLR = FI->mustSaveLR(); // Do we have a frame pointer for this function? - bool HasFP = hasFP(MF) && FrameSize; + bool HasFP = hasFP(MF); int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI); @@ -516,7 +529,7 @@ void PPCFrameInfo::emitEpilogue(MachineFunction &MF, PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>(); bool MustSaveLR = FI->mustSaveLR(); // Do we have a frame pointer for this function? - bool HasFP = hasFP(MF) && FrameSize; + bool HasFP = hasFP(MF); int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI); @@ -735,7 +748,7 @@ PPCFrameInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, MachineFrameInfo *MFI = MF.getFrameInfo(); // If the frame pointer save index hasn't been defined yet. - if (!FPSI && hasFP(MF)) { + if (!FPSI && needsFP(MF)) { // Find out what the fix offset of the frame pointer save area. int FPOffset = getFramePointerSaveOffset(isPPC64, isDarwinABI); // Allocate the frame index for frame pointer save area. @@ -758,7 +771,7 @@ PPCFrameInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // r0 for now. if (RegInfo->requiresRegisterScavenging(MF)) // FIXME (64-bit): Enable. - if (hasFP(MF) || spillsCR(MF)) { + if (needsFP(MF) || spillsCR(MF)) { const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC; @@ -779,7 +792,7 @@ void PPCFrameInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) const std::vector<CalleeSavedInfo> &CSI = FFI->getCalleeSavedInfo(); // Early exit if no callee saved registers are modified! - if (CSI.empty() && !hasFP(MF)) { + if (CSI.empty() && !needsFP(MF)) { return; } @@ -869,7 +882,7 @@ void PPCFrameInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) // Check whether the frame pointer register is allocated. If so, make sure it // is spilled to the correct offset. - if (hasFP(MF)) { + if (needsFP(MF)) { HasGPSaveArea = true; int FI = PFI->getFramePointerSaveIndex(); diff --git a/lib/Target/PowerPC/PPCFrameInfo.h b/lib/Target/PowerPC/PPCFrameInfo.h index 204aec8a8b..470963a817 100644 --- a/lib/Target/PowerPC/PPCFrameInfo.h +++ b/lib/Target/PowerPC/PPCFrameInfo.h @@ -38,6 +38,7 @@ public: void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; bool hasFP(const MachineFunction &MF) const; + bool needsFP(const MachineFunction &MF) const; void getInitialFrameState(std::vector<MachineMove> &Moves) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index daef277332..f931dcbdac 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -258,7 +258,8 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); - const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + const PPCFrameInfo *PPCFI = + static_cast<const PPCFrameInfo*>(MF.getTarget().getFrameInfo()); Reserved.set(PPC::R0); Reserved.set(PPC::R1); @@ -305,7 +306,7 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { } } - if (TFI->hasFP(MF)) + if (PPCFI->needsFP(MF)) Reserved.set(PPC::R31); return Reserved; diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td index 2fbd41bd84..879f26700c 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/lib/Target/PowerPC/PPCRegisterInfo.td @@ -301,12 +301,13 @@ def GPRC : RegisterClass<"PPC", [i32], 32, // When using the 32-bit SVR4 ABI, r13 is reserved for the Small Data Area // pointer. const PPCSubtarget &Subtarget = MF.getTarget().getSubtarget<PPCSubtarget>(); - const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); + const PPCFrameInfo *PPCFI = + static_cast<const PPCFrameInfo*>(MF.getTarget().getFrameInfo()); if (Subtarget.isPPC64() || Subtarget.isSVR4ABI()) return end()-5; // don't allocate R13, R31, R0, R1, LR - if (TFI->hasFP(MF)) + if (PPCFI->needsFP(MF)) return end()-4; // don't allocate R31, R0, R1, LR else return end()-3; // don't allocate R0, R1, LR @@ -331,8 +332,9 @@ def G8RC : RegisterClass<"PPC", [i64], 64, } G8RCClass::iterator G8RCClass::allocation_order_end(const MachineFunction &MF) const { - const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo(); - if (TFI->hasFP(MF)) + const PPCFrameInfo *PPCFI = + static_cast<const PPCFrameInfo*>(MF.getTarget().getFrameInfo()); + if (PPCFI->needsFP(MF)) return end()-5; else return end()-4; diff --git a/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll new file mode 100644 index 0000000000..bf3d577a36 --- /dev/null +++ b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll @@ -0,0 +1,22 @@ +; RUN: llc -disable-fp-elim < %s | FileCheck %s +; PR8749 +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" +target triple = "powerpc-apple-darwin9.8" + +define i32 @main() nounwind { +entry: +; Make sure we're generating references using the red zone +; CHECK: main: +; CHECK: stw r3, -12(r1) + %retval = alloca i32 + %0 = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + store i32 0, i32* %0, align 4 + %1 = load i32* %0, align 4 + store i32 %1, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval + ret i32 %retval1 +} |