diff options
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 17 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll | 13 |
2 files changed, 24 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index d0a3179b99..bdbec30d85 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1155,19 +1155,24 @@ namespace { }; } -/// MergeReturnIntoLDM - If this is a exit BB, try merging the return op -/// (bx lr) into the preceeding stack restore so it directly restore the value -/// of LR into pc. -/// ldmfd sp!, {r7, lr} +/// MergeReturnIntoLDM - If this is a exit BB, try merging the return ops +/// ("bx lr" and "mov pc, lr") into the preceeding stack restore so it +/// directly restore the value of LR into pc. +/// ldmfd sp!, {..., lr} /// bx lr +/// or +/// ldmfd sp!, {..., lr} +/// mov pc, lr /// => -/// ldmfd sp!, {r7, pc} +/// ldmfd sp!, {..., pc} bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) { if (MBB.empty()) return false; MachineBasicBlock::iterator MBBI = prior(MBB.end()); if (MBBI != MBB.begin() && - (MBBI->getOpcode() == ARM::BX_RET || MBBI->getOpcode() == ARM::tBX_RET)) { + (MBBI->getOpcode() == ARM::BX_RET || + MBBI->getOpcode() == ARM::tBX_RET || + MBBI->getOpcode() == ARM::MOVPCLR)) { MachineInstr *PrevMI = prior(MBBI); if (PrevMI->getOpcode() == ARM::LDM_UPD || PrevMI->getOpcode() == ARM::t2LDM_UPD) { diff --git a/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll new file mode 100644 index 0000000000..31525eff44 --- /dev/null +++ b/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv5-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s + +define i32 @bar(i32 %a) nounwind { +entry: + %0 = tail call i32 @foo(i32 %a) nounwind ; <i32> [#uses=1] + %1 = add nsw i32 %0, 3 ; <i32> [#uses=1] +; CHECK: ldmia sp!, {r11, pc} + ret i32 %1 +} + +declare i32 @foo(i32) |