diff options
| -rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 10 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 15 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 8 |
3 files changed, 33 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index c6afba5a15..e36c89fd59 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -214,6 +214,16 @@ public: return get(Opcode).Flags & M_TERMINATOR_FLAG; } + // + // Return true if the instruction is a register to register move and + // leave the source and dest operands in the passed parameters. + // + virtual bool isMoveInstr(const MachineInstr& MI, + unsigned& sourceReg, + unsigned& destReg) const { + return false; + } + // Check if an instruction can be issued before its operands are ready, // or if a subsequent instruction that uses its result can be issued // before the results are ready. diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 681bf023d9..ab41e9ec25 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -51,3 +51,18 @@ bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const { return false; } +bool X86InstrInfo::isMoveInstr(const MachineInstr& MI, + unsigned& sourceReg, + unsigned& destReg) const { + MachineOpCode oc = MI.getOpcode(); + if (oc == X86::MOVrr8 || oc == X86::MOVrr16 || oc == X86::MOVrr32) { + assert(MI.getNumOperands() == 2 && + MI.getOperand(0).isRegister() && + MI.getOperand(1).isRegister() && + "invalid register-register move instruction"); + sourceReg = MI.getOperand(1).getAllocatedRegNum(); + destReg = MI.getOperand(0).getAllocatedRegNum(); + return true; + } + return false; +} diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 5e371dd99a..0639c2d053 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -169,6 +169,14 @@ public: /// MachineInstr* createNOPinstr() const; + // + // Return true if the instruction is a register to register move and + // leave the source and dest operands in the passed parameters. + // + virtual bool isMoveInstr(const MachineInstr& MI, + unsigned& sourceReg, + unsigned& destReg) const; + /// isNOPinstr - not having a special NOP opcode, we need to know if a given /// instruction is interpreted as an `official' NOP instr, i.e., there may be /// more than one way to `do nothing' but only one canonical way to slack off. |