diff options
94 files changed, 2784 insertions, 611 deletions
@@ -74,12 +74,10 @@ endif ifeq ($(MAKECMDGOALS),install-clang) DIRS := tools/clang/tools/driver tools/clang/lib/Headers \ tools/clang/tools/libclang \ + tools/clang/tools/c-index-test \ tools/clang/include/clang-c \ tools/clang/runtime tools/clang/docs \ tools/lto runtime - ifneq ($(BUILD_CLANG_ONLY),YES) - DIRS += tools/clang/tools/c-index-test - endif OPTIONAL_DIRS := NO_INSTALL = 1 endif diff --git a/docs/CommandGuide/FileCheck.rst b/docs/CommandGuide/FileCheck.rst index 51a9bf6293..1d7a462bd7 100644 --- a/docs/CommandGuide/FileCheck.rst +++ b/docs/CommandGuide/FileCheck.rst @@ -45,6 +45,11 @@ OPTIONS +**--input-file** *filename* + + File to check (defaults to stdin). + + **--strict-whitespace** By default, FileCheck canonicalizes input horizontal whitespace (spaces and @@ -271,8 +276,9 @@ simple example: The first check line matches a regex (**%[a-z]+**) and captures it into the variable "REGISTER". The second line verifies that whatever is in REGISTER occurs later in the file after an "andw". FileCheck variable references are -always contained in **[[ ]]** pairs, are named, and their names can be -name, then it is a definition of the variable, if not, it is a use. +always contained in **[[ ]]** pairs, and their names can be formed with the +regex **[a-zA-Z][a-zA-Z0-9]***. If a colon follows the name, then it is a +definition of the variable; otherwise, it is a use. FileCheck variables can be defined multiple times, and uses always get the latest value. Note that variables are all read at the start of a "CHECK" line diff --git a/docs/Phabricator.rst b/docs/Phabricator.rst index 13ef9eddd3..b45449793e 100644 --- a/docs/Phabricator.rst +++ b/docs/Phabricator.rst @@ -50,8 +50,8 @@ reviewer understand your code. To get a full diff, use one of the following commands (or just use Arcanist to upload your patch): -* git diff -U999999 other-branch -* svn diff --diff-cmd=diff -x -U999999 +* ``git diff -U999999 other-branch`` +* ``svn diff --diff-cmd=diff -x -U999999`` To upload a new patch: diff --git a/docs/TestingGuide.html b/docs/TestingGuide.html index ae2643fe4e..d90c8ad1c3 100644 --- a/docs/TestingGuide.html +++ b/docs/TestingGuide.html @@ -218,11 +218,11 @@ you can run the LLVM and Clang tests simultaneously using:</p> <p>To run individual tests or subsets of tests, you can use the 'llvm-lit' script which is built as part of LLVM. For example, to run the -'Integer/BitCast.ll' test by itself you can run:</p> +'Integer/BitPacked.ll' test by itself you can run:</p> <div class="doc_code"> <pre> -% llvm-lit ~/llvm/test/Integer/BitCast.ll +% llvm-lit ~/llvm/test/Integer/BitPacked.ll </pre> </div> diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index 2b96c7abe4..31bd606f93 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -154,6 +154,8 @@ public: bool empty() const { return Queue.empty(); } + void clear() { Queue.clear(); } + unsigned size() const { return Queue.size(); } typedef std::vector<SUnit*>::iterator iterator; @@ -171,10 +173,12 @@ public: SU->NodeQueueId |= ID; } - void remove(iterator I) { + iterator remove(iterator I) { (*I)->NodeQueueId &= ~ID; *I = Queue.back(); + unsigned idx = I - Queue.begin(); Queue.pop_back(); + return Queue.begin() + idx; } #ifndef NDEBUG @@ -306,6 +310,9 @@ protected: /// Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues. void placeDebugValues(); + /// \brief dump the scheduled Sequence. + void dumpSchedule() const; + // Lesser helpers... void initRegPressure(); diff --git a/include/llvm/CodeGen/RegisterPressure.h b/include/llvm/CodeGen/RegisterPressure.h index 2043155bc5..30326d05df 100644 --- a/include/llvm/CodeGen/RegisterPressure.h +++ b/include/llvm/CodeGen/RegisterPressure.h @@ -43,7 +43,7 @@ struct RegisterPressure { /// class. This is only useful to account for spilling or rematerialization. void decrease(const TargetRegisterClass *RC, const TargetRegisterInfo *TRI); - void dump(const TargetRegisterInfo *TRI); + void dump(const TargetRegisterInfo *TRI) const; }; /// RegisterPressure computed within a region of instructions delimited by @@ -197,6 +197,7 @@ public: /// This result is complete if either advance() or recede() has returned true, /// or if closeRegion() was explicitly invoked. RegisterPressure &getPressure() { return P; } + const RegisterPressure &getPressure() const { return P; } /// Get the register set pressure at the current position, which may be less /// than the pressure across the traversed region. diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index 05b74b09cb..7e0ca1478e 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -31,6 +31,7 @@ namespace llvm { class MachineFunction; class MachineRegisterInfo; class MachineInstr; + struct MCSchedClassDesc; class TargetRegisterInfo; class ScheduleDAG; class SDNode; @@ -52,6 +53,13 @@ namespace llvm { Order ///< Any other ordering dependency. }; + enum OrderKind { + Barrier, ///< An unknown scheduling barrier. + MayAliasMem, ///< Nonvolatile load/Store instructions that may alias. + MustAliasMem, ///< Nonvolatile load/Store instructions that must alias. + Artificial ///< Arbitrary weak DAG edge (no actual dependence). + }; + private: /// Dep - A pointer to the depending/depended-on SUnit, and an enum /// indicating the kind of the dependency. @@ -65,20 +73,7 @@ namespace llvm { unsigned Reg; /// Order - Additional information about Order dependencies. - struct { - /// isNormalMemory - True if both sides of the dependence - /// access memory in non-volatile and fully modeled ways. - bool isNormalMemory : 1; - - /// isMustAlias - True if both sides of the dependence are known to - /// access the same memory. - bool isMustAlias : 1; - - /// isArtificial - True if this is an artificial dependency, meaning - /// it is not necessary for program correctness, and may be safely - /// deleted if necessary. - bool isArtificial : 1; - } Order; + unsigned OrdKind; // enum OrderKind } Contents; /// Latency - The time associated with this edge. Often this is just @@ -86,6 +81,9 @@ namespace llvm { /// models may provide additional information about specific edges. unsigned Latency; /// Record MinLatency seperately from "expected" Latency. + /// + /// FIXME: this field is not packed on LP64. Convert to 16-bit DAG edge + /// latency after introducing saturating truncation. unsigned MinLatency; public: @@ -95,28 +93,28 @@ namespace llvm { SDep() : Dep(0, Data) {} /// SDep - Construct an SDep with the specified values. - SDep(SUnit *S, Kind kind, unsigned latency = 1, unsigned Reg = 0, - bool isNormalMemory = false, bool isMustAlias = false, - bool isArtificial = false) - : Dep(S, kind), Conte |