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-rw-r--r--test/CodeGen/PTX/add.ll40
-rw-r--r--test/CodeGen/PTX/aggregates.ll1
-rw-r--r--test/CodeGen/PTX/bitwise.ll6
-rw-r--r--test/CodeGen/PTX/bra.ll8
-rw-r--r--test/CodeGen/PTX/cvt.ll138
-rw-r--r--test/CodeGen/PTX/fdiv-sm10.ll8
-rw-r--r--test/CodeGen/PTX/fdiv-sm13.ll8
-rw-r--r--test/CodeGen/PTX/fneg.ll8
-rw-r--r--test/CodeGen/PTX/intrinsic.ll134
-rw-r--r--test/CodeGen/PTX/ld.ll220
-rw-r--r--test/CodeGen/PTX/llvm-intrinsic.ll24
-rw-r--r--test/CodeGen/PTX/mad.ll8
-rw-r--r--test/CodeGen/PTX/mov.ll24
-rw-r--r--test/CodeGen/PTX/mul.ll16
-rw-r--r--test/CodeGen/PTX/parameter-order.ll4
-rw-r--r--test/CodeGen/PTX/selp.ll8
-rw-r--r--test/CodeGen/PTX/setp.ll136
-rw-r--r--test/CodeGen/PTX/shl.ll6
-rw-r--r--test/CodeGen/PTX/shr.ll12
-rw-r--r--test/CodeGen/PTX/simple-call.ll1
-rw-r--r--test/CodeGen/PTX/st.ll200
-rw-r--r--test/CodeGen/PTX/sub.ll40
22 files changed, 526 insertions, 524 deletions
diff --git a/test/CodeGen/PTX/add.ll b/test/CodeGen/PTX/add.ll
index 293aebe51e..e20bcff9dd 100644
--- a/test/CodeGen/PTX/add.ll
+++ b/test/CodeGen/PTX/add.ll
@@ -1,71 +1,71 @@
; RUN: llc < %s -march=ptx32 | FileCheck %s
define ptx_device i16 @t1_u16(i16 %x, i16 %y) {
-; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, rh{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
%z = add i16 %x, %y
ret i16 %z
}
define ptx_device i32 @t1_u32(i32 %x, i32 %y) {
-; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
%z = add i32 %x, %y
ret i32 %z
}
define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
-; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
%z = add i64 %x, %y
ret i64 %z
}
define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}
-; CHECK-NEXT: ret;
+; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
+; CHECK: ret;
%z = fadd float %x, %y
ret float %z
}
define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}
-; CHECK-NEXT: ret;
+; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
+; CHECK: ret;
%z = fadd double %x, %y
ret double %z
}
define ptx_device i16 @t2_u16(i16 %x) {
-; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, 1;
-; CHECK-NEXT: ret;
+; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, 1;
+; CHECK: ret;
%z = add i16 %x, 1
ret i16 %z
}
define ptx_device i32 @t2_u32(i32 %x) {
-; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, 1;
-; CHECK-NEXT: ret;
+; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, 1;
+; CHECK: ret;
%z = add i32 %x, 1
ret i32 %z
}
define ptx_device i64 @t2_u64(i64 %x) {
-; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, 1;
-; CHECK-NEXT: ret;
+; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, 1;
+; CHECK: ret;
%z = add i64 %x, 1
ret i64 %z
}
define ptx_device float @t2_f32(float %x) {
-; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0F3F800000;
-; CHECK-NEXT: ret;
+; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0F3F800000;
+; CHECK: ret;
%z = fadd float %x, 1.0
ret float %z
}
define ptx_device double @t2_f64(double %x) {
-; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0D3FF0000000000000;
-; CHECK-NEXT: ret;
+; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0D3FF0000000000000;
+; CHECK: ret;
%z = fadd double %x, 1.0
ret double %z
}
diff --git a/test/CodeGen/PTX/aggregates.ll b/test/CodeGen/PTX/aggregates.ll
index 23f28a79c0..3fc0c40881 100644
--- a/test/CodeGen/PTX/aggregates.ll
+++ b/test/CodeGen/PTX/aggregates.ll
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=ptx32 -mattr=sm20 | FileCheck %s
+; XFAIL: *
%complex = type { float, float }
diff --git a/test/CodeGen/PTX/bitwise.ll b/test/CodeGen/PTX/bitwise.ll
index 3859280735..1403a23d1d 100644
--- a/test/CodeGen/PTX/bitwise.ll
+++ b/test/CodeGen/PTX/bitwise.ll
@@ -3,21 +3,21 @@
; preds
define ptx_device i32 @t1_and_preds(i1 %x, i1 %y) {
-; CHECK: and.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}}
+; CHECK: and.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}}
%c = and i1 %x, %y
%d = zext i1 %c to i32
ret i32 %d
}
define ptx_device i32 @t1_or_preds(i1 %x, i1 %y) {
-; CHECK: or.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}}
+; CHECK: or.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}}
%a = or i1 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
define ptx_device i32 @t1_xor_preds(i1 %x, i1 %y) {
-; CHECK: xor.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}}
+; CHECK: xor.pred %p{{[0-9]+}}, %p{{[0-9]+}}, %p{{[0-9]+}}
%a = xor i1 %x, %y
%b = zext i1 %a to i32
ret i32 %b
diff --git a/test/CodeGen/PTX/bra.ll b/test/CodeGen/PTX/bra.ll
index 7cc944466d..464c29cca8 100644
--- a/test/CodeGen/PTX/bra.ll
+++ b/test/CodeGen/PTX/bra.ll
@@ -10,15 +10,15 @@ loop:
define ptx_device i32 @test_bra_cond_direct(i32 %x, i32 %y) {
entry:
-; CHECK: setp.le.u32 p0, r[[R0:[0-9]+]], r[[R1:[0-9]+]]
+; CHECK: setp.le.u32 %p0, %r[[R0:[0-9]+]], %r[[R1:[0-9]+]]
%p = icmp ugt i32 %x, %y
-; CHECK-NEXT: @p0 bra
+; CHECK-NEXT: @%p0 bra
; CHECK-NOT: bra
br i1 %p, label %clause.if, label %clause.else
clause.if:
-; CHECK: mov.u32 r{{[0-9]+}}, r[[R0]]
+; CHECK: mov.u32 %ret{{[0-9]+}}, %r[[R0]]
ret i32 %x
clause.else:
-; CHECK: mov.u32 r{{[0-9]+}}, r[[R1]]
+; CHECK: mov.u32 %ret{{[0-9]+}}, %r[[R1]]
ret i32 %y
}
diff --git a/test/CodeGen/PTX/cvt.ll b/test/CodeGen/PTX/cvt.ll
index 853abaf7fc..943712ff73 100644
--- a/test/CodeGen/PTX/cvt.ll
+++ b/test/CodeGen/PTX/cvt.ll
@@ -4,10 +4,10 @@
; (note: we convert back to i32 to return)
define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) {
-; CHECK: setp.gt.u16 p[[P0:[0-9]+]], rh{{[0-9]+}}, 0
-; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
-; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
-; CHECK-NEXT: ret;
+; CHECK: setp.gt.u16 %p[[P0:[0-9]+]], %rh{{[0-9]+}}, 0
+; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}};
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]];
+; CHECK: ret;
%a = trunc i16 %x to i1
%b = and i1 %a, %y
%c = zext i1 %b to i32
@@ -15,10 +15,10 @@ define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) {
}
define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) {
-; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0
-; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
-; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
-; CHECK-NEXT: ret;
+; CHECK: setp.gt.u32 %p[[P0:[0-9]+]], %r{{[0-9]+}}, 0
+; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}};
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]];
+; CHECK: ret;
%a = trunc i32 %x to i1
%b = and i1 %a, %y
%c = zext i1 %b to i32
@@ -26,10 +26,10 @@ define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) {
}
define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) {
-; CHECK: setp.gt.u64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0
-; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
-; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
-; CHECK-NEXT: ret;
+; CHECK: setp.gt.u64 %p[[P0:[0-9]+]], %rd{{[0-9]+}}, 0
+; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}};
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]];
+; CHECK: ret;
%a = trunc i64 %x to i1
%b = and i1 %a, %y
%c = zext i1 %b to i32
@@ -37,10 +37,10 @@ define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) {
}
define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) {
-; CHECK: setp.gt.f32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0
-; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
-; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
-; CHECK-NEXT: ret;
+; CHECK: setp.gt.f32 %p[[P0:[0-9]+]], %f{{[0-9]+}}, 0
+; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}};
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]];
+; CHECK: ret;
%a = fptoui float %x to i1
%b = and i1 %a, %y
%c = zext i1 %b to i32
@@ -48,10 +48,10 @@ define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) {
}
define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) {
-; CHECK: setp.gt.f64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0
-; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}};
-; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]];
-; CHECK-NEXT: ret;
+; CHECK: setp.gt.f64 %p[[P0:[0-9]+]], %fd{{[0-9]+}}, 0
+; CHECK: and.pred %p2, %p[[P0:[0-9]+]], %p{{[0-9]+}};
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p[[P0:[0-9]+]];
+; CHECK: ret;
%a = fptoui double %x to i1
%b = and i1 %a, %y
%c = zext i1 %b to i32
@@ -61,36 +61,36 @@ define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) {
; i16
define ptx_device i16 @cvt_i16_preds(i1 %x) {
-; CHECK: selp.u16 rh{{[0-9]+}}, 1, 0, p{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: selp.u16 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}};
+; CHECK: ret;
%a = zext i1 %x to i16
ret i16 %a
}
define ptx_device i16 @cvt_i16_i32(i32 %x) {
-; CHECK: cvt.u16.u32 rh{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u16.u32 %ret{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
%a = trunc i32 %x to i16
ret i16 %a
}
define ptx_device i16 @cvt_i16_i64(i64 %x) {
-; CHECK: cvt.u16.u64 rh{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u16.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
%a = trunc i64 %x to i16
ret i16 %a
}
define ptx_device i16 @cvt_i16_f32(float %x) {
-; CHECK: cvt.rzi.u16.f32 rh{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rzi.u16.f32 %ret{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fptoui float %x to i16
ret i16 %a
}
define ptx_device i16 @cvt_i16_f64(double %x) {
-; CHECK: cvt.rzi.u16.f64 rh{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rzi.u16.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%a = fptoui double %x to i16
ret i16 %a
}
@@ -98,36 +98,36 @@ define ptx_device i16 @cvt_i16_f64(double %x) {
; i32
define ptx_device i32 @cvt_i32_preds(i1 %x) {
-; CHECK: selp.u32 r{{[0-9]+}}, 1, 0, p{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: selp.u32 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}};
+; CHECK: ret;
%a = zext i1 %x to i32
ret i32 %a
}
define ptx_device i32 @cvt_i32_i16(i16 %x) {
-; CHECK: cvt.u32.u16 r{{[0-9]+}}, rh{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u32.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
%a = zext i16 %x to i32
ret i32 %a
}
define ptx_device i32 @cvt_i32_i64(i64 %x) {
-; CHECK: cvt.u32.u64 r{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u32.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
%a = trunc i64 %x to i32
ret i32 %a
}
define ptx_device i32 @cvt_i32_f32(float %x) {
-; CHECK: cvt.rzi.u32.f32 r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rzi.u32.f32 %ret{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fptoui float %x to i32
ret i32 %a
}
define ptx_device i32 @cvt_i32_f64(double %x) {
-; CHECK: cvt.rzi.u32.f64 r{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rzi.u32.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%a = fptoui double %x to i32
ret i32 %a
}
@@ -135,35 +135,35 @@ define ptx_device i32 @cvt_i32_f64(double %x) {
; i64
define ptx_device i64 @cvt_i64_preds(i1 %x) {
-; CHECK: selp.u64 rd{{[0-9]+}}, 1, 0, p{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: selp.u64 %ret{{[0-9]+}}, 1, 0, %p{{[0-9]+}};
+; CHECK: ret;
%a = zext i1 %x to i64
ret i64 %a
}
define ptx_device i64 @cvt_i64_i16(i16 %x) {
-; CHECK: cvt.u64.u16 rd{{[0-9]+}}, rh{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u64.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
%a = zext i16 %x to i64
ret i64 %a
}
define ptx_device i64 @cvt_i64_i32(i32 %x) {
-; CHECK: cvt.u64.u32 rd{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.u64.u32 %ret{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
%a = zext i32 %x to i64
ret i64 %a
}
define ptx_device i64 @cvt_i64_f32(float %x) {
-; CHECK: cvt.rzi.u64.f32 rd{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rzi.u64.f32 %ret{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fptoui float %x to i64
ret i64 %a
}
define ptx_device i64 @cvt_i64_f64(double %x) {
-; CHECK: cvt.rzi.u64.f64 rd{{[0-9]+}}, rd{{[0-9]+}};
+; CHECK: cvt.rzi.u64.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}};
; CHECK: ret;
%a = fptoui double %x to i64
ret i64 %a
@@ -172,36 +172,36 @@ define ptx_device i64 @cvt_i64_f64(double %x) {
; f32
define ptx_device float @cvt_f32_preds(i1 %x) {
-; CHECK: selp.f32 r{{[0-9]+}}, 0F3F800000, 0F00000000, p{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: selp.f32 %ret{{[0-9]+}}, 0F3F800000, 0F00000000, %p{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i1 %x to float
ret float %a
}
define ptx_device float @cvt_f32_i16(i16 %x) {
-; CHECK: cvt.rn.f32.u16 r{{[0-9]+}}, rh{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f32.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i16 %x to float
ret float %a
}
define ptx_device float @cvt_f32_i32(i32 %x) {
-; CHECK: cvt.rn.f32.u32 r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f32.u32 %ret{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i32 %x to float
ret float %a
}
define ptx_device float @cvt_f32_i64(i64 %x) {
-; CHECK: cvt.rn.f32.u64 r{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f32.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i64 %x to float
ret float %a
}
define ptx_device float @cvt_f32_f64(double %x) {
-; CHECK: cvt.rn.f32.f64 r{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f32.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%a = fptrunc double %x to float
ret float %a
}
@@ -209,36 +209,36 @@ define ptx_device float @cvt_f32_f64(double %x) {
; f64
define ptx_device double @cvt_f64_preds(i1 %x) {
-; CHECK: selp.f64 rd{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, p{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: selp.f64 %ret{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, %p{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i1 %x to double
ret double %a
}
define ptx_device double @cvt_f64_i16(i16 %x) {
-; CHECK: cvt.rn.f64.u16 rd{{[0-9]+}}, rh{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f64.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i16 %x to double
ret double %a
}
define ptx_device double @cvt_f64_i32(i32 %x) {
-; CHECK: cvt.rn.f64.u32 rd{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f64.u32 %ret{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i32 %x to double
ret double %a
}
define ptx_device double @cvt_f64_i64(i64 %x) {
-; CHECK: cvt.rn.f64.u64 rd{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.rn.f64.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
%a = uitofp i64 %x to double
ret double %a
}
define ptx_device double @cvt_f64_f32(float %x) {
-; CHECK: cvt.f64.f32 rd{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: cvt.f64.f32 %ret{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fpext float %x to double
ret double %a
}
diff --git a/test/CodeGen/PTX/fdiv-sm10.ll b/test/CodeGen/PTX/fdiv-sm10.ll
index 049d8913b3..e1013befa2 100644
--- a/test/CodeGen/PTX/fdiv-sm10.ll
+++ b/test/CodeGen/PTX/fdiv-sm10.ll
@@ -1,15 +1,15 @@
; RUN: llc < %s -march=ptx32 -mattr=+sm10 | FileCheck %s
define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: div.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: div.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fdiv float %x, %y
ret float %a
}
define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: div.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: div.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%a = fdiv double %x, %y
ret double %a
}
diff --git a/test/CodeGen/PTX/fdiv-sm13.ll b/test/CodeGen/PTX/fdiv-sm13.ll
index 2d953397d3..1afa2ebd08 100644
--- a/test/CodeGen/PTX/fdiv-sm13.ll
+++ b/test/CodeGen/PTX/fdiv-sm13.ll
@@ -1,15 +1,15 @@
; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s
define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: div.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: div.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%a = fdiv float %x, %y
ret float %a
}
define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: div.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: div.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%a = fdiv double %x, %y
ret double %a
}
diff --git a/test/CodeGen/PTX/fneg.ll b/test/CodeGen/PTX/fneg.ll
index 66ca74a6ff..2b76e638f6 100644
--- a/test/CodeGen/PTX/fneg.ll
+++ b/test/CodeGen/PTX/fneg.ll
@@ -1,15 +1,15 @@
; RUN: llc < %s -march=ptx32 | FileCheck %s
define ptx_device float @t1_f32(float %x) {
-; CHECK: neg.f32 r{{[0-9]+}}, r{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: neg.f32 %ret{{[0-9]+}}, %f{{[0-9]+}};
+; CHECK: ret;
%y = fsub float -0.000000e+00, %x
ret float %y
}
define ptx_device double @t1_f64(double %x) {
-; CHECK: neg.f64 rd{{[0-9]+}}, rd{{[0-9]+}};
-; CHECK-NEXT: ret;
+; CHECK: neg.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}};
+; CHECK: ret;
%y = fsub double -0.000000e+00, %x
ret double %y
}
diff --git a/test/CodeGen/PTX/intrinsic.ll b/test/CodeGen/PTX/intrinsic.ll
index af987d6588..9f37ead38d 100644
--- a/test/CodeGen/PTX/intrinsic.ll
+++ b/test/CodeGen/PTX/intrinsic.ll
@@ -1,239 +1,239 @@
; RUN: llc < %s -march=ptx32 -mattr=+ptx20 | FileCheck %s
define ptx_device i32 @test_tid_x() {
-; CHECK: mov.u32 r0, %tid.x;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %tid.x;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.tid.x()
ret i32 %x
}
define ptx_device i32 @test_tid_y() {
-; CHECK: mov.u32 r0, %tid.y;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %tid.y;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.tid.y()
ret i32 %x
}
define ptx_device i32 @test_tid_z() {
-; CHECK: mov.u32 r0, %tid.z;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %tid.z;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.tid.z()
ret i32 %x
}
define ptx_device i32 @test_tid_w() {
-; CHECK: mov.u32 r0, %tid.w;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %tid.w;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.tid.w()
ret i32 %x
}
define ptx_device i32 @test_ntid_x() {
-; CHECK: mov.u32 r0, %ntid.x;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ntid.x;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ntid.x()
ret i32 %x
}
define ptx_device i32 @test_ntid_y() {
-; CHECK: mov.u32 r0, %ntid.y;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ntid.y;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ntid.y()
ret i32 %x
}
define ptx_device i32 @test_ntid_z() {
-; CHECK: mov.u32 r0, %ntid.z;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ntid.z;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ntid.z()
ret i32 %x
}
define ptx_device i32 @test_ntid_w() {
-; CHECK: mov.u32 r0, %ntid.w;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ntid.w;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ntid.w()
ret i32 %x
}
define ptx_device i32 @test_laneid() {
-; CHECK: mov.u32 r0, %laneid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %laneid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.laneid()
ret i32 %x
}
define ptx_device i32 @test_warpid() {
-; CHECK: mov.u32 r0, %warpid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %warpid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.warpid()
ret i32 %x
}
define ptx_device i32 @test_nwarpid() {
-; CHECK: mov.u32 r0, %nwarpid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nwarpid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nwarpid()
ret i32 %x
}
define ptx_device i32 @test_ctaid_x() {
-; CHECK: mov.u32 r0, %ctaid.x;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ctaid.x;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ctaid.x()
ret i32 %x
}
define ptx_device i32 @test_ctaid_y() {
-; CHECK: mov.u32 r0, %ctaid.y;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ctaid.y;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ctaid.y()
ret i32 %x
}
define ptx_device i32 @test_ctaid_z() {
-; CHECK: mov.u32 r0, %ctaid.z;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ctaid.z;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ctaid.z()
ret i32 %x
}
define ptx_device i32 @test_ctaid_w() {
-; CHECK: mov.u32 r0, %ctaid.w;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %ctaid.w;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.ctaid.w()
ret i32 %x
}
define ptx_device i32 @test_nctaid_x() {
-; CHECK: mov.u32 r0, %nctaid.x;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nctaid.x;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nctaid.x()
ret i32 %x
}
define ptx_device i32 @test_nctaid_y() {
-; CHECK: mov.u32 r0, %nctaid.y;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nctaid.y;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nctaid.y()
ret i32 %x
}
define ptx_device i32 @test_nctaid_z() {
-; CHECK: mov.u32 r0, %nctaid.z;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nctaid.z;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nctaid.z()
ret i32 %x
}
define ptx_device i32 @test_nctaid_w() {
-; CHECK: mov.u32 r0, %nctaid.w;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nctaid.w;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nctaid.w()
ret i32 %x
}
define ptx_device i32 @test_smid() {
-; CHECK: mov.u32 r0, %smid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %smid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.smid()
ret i32 %x
}
define ptx_device i32 @test_nsmid() {
-; CHECK: mov.u32 r0, %nsmid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %nsmid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.nsmid()
ret i32 %x
}
define ptx_device i32 @test_gridid() {
-; CHECK: mov.u32 r0, %gridid;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %gridid;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.gridid()
ret i32 %x
}
define ptx_device i32 @test_lanemask_eq() {
-; CHECK: mov.u32 r0, %lanemask_eq;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %lanemask_eq;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.lanemask.eq()
ret i32 %x
}
define ptx_device i32 @test_lanemask_le() {
-; CHECK: mov.u32 r0, %lanemask_le;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %lanemask_le;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.lanemask.le()
ret i32 %x
}
define ptx_device i32 @test_lanemask_lt() {
-; CHECK: mov.u32 r0, %lanemask_lt;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %lanemask_lt;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.lanemask.lt()
ret i32 %x
}
define ptx_device i32 @test_lanemask_ge() {
-; CHECK: mov.u32 r0, %lanemask_ge;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %lanemask_ge;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.lanemask.ge()
ret i32 %x
}
define ptx_device i32 @test_lanemask_gt() {
-; CHECK: mov.u32 r0, %lanemask_gt;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %lanemask_gt;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.lanemask.gt()
ret i32 %x
}
define ptx_device i32 @test_clock() {
-; CHECK: mov.u32 r0, %clock;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %clock;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.clock()
ret i32 %x
}
define ptx_device i64 @test_clock64() {
-; CHECK: mov.u64 rd0, %clock64;
-; CHECK-NEXT: ret;
+; CHECK: mov.u64 %ret0, %clock64;
+; CHECK: ret;
%x = call i64 @llvm.ptx.read.clock64()
ret i64 %x
}
define ptx_device i32 @test_pm0() {
-; CHECK: mov.u32 r0, %pm0;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %pm0;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.pm0()
ret i32 %x
}
define ptx_device i32 @test_pm1() {
-; CHECK: mov.u32 r0, %pm1;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %pm1;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.pm1()
ret i32 %x
}
define ptx_device i32 @test_pm2() {
-; CHECK: mov.u32 r0, %pm2;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %pm2;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.pm2()
ret i32 %x
}
define ptx_device i32 @test_pm3() {
-; CHECK: mov.u32 r0, %pm3;
-; CHECK-NEXT: ret;
+; CHECK: mov.u32 %ret0, %pm3;
+; CHECK: ret;
%x = call i32 @llvm.ptx.read.pm3()
ret i32 %x
}
define ptx_device void @test_bar_sync() {
; CHECK: bar.sync 0
-; CHECK-NEXT: ret;
+; CHECK: ret;
call void @llvm.ptx.bar.sync(i32 0)
ret void
}
diff --git a/test/CodeGen/PTX/ld.ll b/test/CodeGen/PTX/ld.ll
index d184d1243a..95941dc210 100644
--- a/test/CodeGen/PTX/ld.ll
+++ b/test/CodeGen/PTX/ld.ll
@@ -63,48 +63,48 @@
define ptx_device i16 @t1_u16(i16* %p) {
entry:
-;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
+;CHECK: ret;
%x = load i16* %p
ret i16 %x
}
define ptx_device i32 @t1_u32(i32* %p) {
entry:
-;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
+;CHECK: ret;
%x = load i32* %p
ret i32 %x
}
define ptx_device i64 @t1_u64(i64* %p) {
entry:
-;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
+;CHECK: ret;
%x = load i64* %p
ret i64 %x
}
define ptx_device float @t1_f32(float* %p) {
entry:
-;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
+;CHECK: ret;
%x = load float* %p
ret float %x
}
define ptx_device double @t1_f64(double* %p) {
entry:
-;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
+;CHECK: ret;
%x = load double* %p
ret double %x
}
define ptx_device i16 @t2_u16(i16* %p) {
entry:
-;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}+2];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}+2];
+;CHECK: ret;
%i = getelementptr i16* %p, i32 1
%x = load i16* %i
ret i16 %x
@@ -112,8 +112,8 @@ entry:
define ptx_device i32 @t2_u32(i32* %p) {
entry:
-;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}+4];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}+4];
+;CHECK: ret;
%i = getelementptr i32* %p, i32 1
%x = load i32* %i
ret i32 %x
@@ -121,8 +121,8 @@ entry:
define ptx_device i64 @t2_u64(i64* %p) {
entry:
-;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}+8];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}+8];
+;CHECK: ret;
%i = getelementptr i64* %p, i32 1
%x = load i64* %i
ret i64 %x
@@ -130,8 +130,8 @@ entry:
define ptx_device float @t2_f32(float* %p) {
entry:
-;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}+4];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.f32 %ret{{[0-9]+}}, [%r{{[0-9]+}}+4];
+;CHECK: ret;
%i = getelementptr float* %p, i32 1
%x = load float* %i
ret float %x
@@ -139,8 +139,8 @@ entry:
define ptx_device double @t2_f64(double* %p) {
entry:
-;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}+8];
-;CHECK-NEXT: ret;
+;CHECK: ld.global.f64 %ret{{[0-9]+}}, [%r{{[0-9]+}}+8];
+;CHECK: ret;
%i = getelementptr double* %p, i32 1
%x = load double* %i
ret double %x
@@ -148,9 +148,9 @@ entry:
define ptx_device i16 @t3_u16(i16* %p, i32 %q) {
entry:
-;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 1;
-;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]];
-;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]];
+;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 1;
+;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
+;CHECK: ld.global.u16 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
%i = getelementptr i16* %p, i32 %q
%x = load i16* %i
ret i16 %x
@@ -158,9 +158,9 @@ entry:
define ptx_device i32 @t3_u32(i32* %p, i32 %q) {
entry:
-;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2;
-;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]];
-;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]];
+;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 2;
+;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
+;CHECK: ld.global.u32 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
%i = getelementptr i32* %p, i32 %q
%x = load i32* %i
ret i32 %x
@@ -168,9 +168,9 @@ entry:
define ptx_device i64 @t3_u64(i64* %p, i32 %q) {
entry:
-;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3;
-;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]];
-;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]];
+;CHECK: shl.b32 %r[[R0:[0-9]+]], %r{{[0-9]+}}, 3;
+;CHECK: add.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r[[R0]];
+;CHECK: ld.global.u64 %ret{{[0-9]+}}, [%r{{[0-9]+}}];
%i = getelementptr i64* %p, i32 %q
%x = load i64* %i
ret i64 %x
@@ -178,9 +178,9 @@ e