aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--lib/Target/X86/X86FastISel.cpp4
-rw-r--r--test/CodeGen/X86/fast-isel-constpool.ll17
2 files changed, 20 insertions, 1 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index bd994dea8f..dcb8852a89 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -1514,7 +1514,9 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
} else if (Subtarget->isPICStyleGOT()) {
OpFlag = X86II::MO_GOTOFF;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
- }
+ } else if (Subtarget->isPICStyleRIPRel() &&
+ TM.getCodeModel() == CodeModel::Small)
+ PICBase = X86::RIP;
}
// Create the load from the constant pool.
diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll
new file mode 100644
index 0000000000..ac2595a746
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-constpool.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)}
+; Make sure fast isel uses rip-relative addressing when required.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.0"
+
+define i32 @f0(double %x) nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %x.addr = alloca double ; <double*> [#uses=2]
+ store double %x, double* %x.addr
+ %tmp = load double* %x.addr ; <double> [#uses=1]
+ %cmp = fcmp olt double %tmp, 8.500000e-01 ; <i1> [#uses=1]
+ %conv = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ store i32 %conv, i32* %retval
+ %0 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %0
+}