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authorMichael Liao <michael.liao@intel.com>2013-04-11 04:52:28 +0000
committerMichael Liao <michael.liao@intel.com>2013-04-11 04:52:28 +0000
commit02d2e612521954b5ff7c1ba6fd53e36bc51e1c48 (patch)
treeaf6fc7afc6bc91ff6926a48e7819b9538dc1bf68 /utils
parent959ddbb5e0e088f4d5c3f8c015de3caf0baa6e6c (diff)
Add CLAC/STAC instruction encoding/decoding support
As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp36
1 files changed, 19 insertions, 17 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index 61b9813b06..46f2052b01 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -29,23 +29,25 @@ using namespace llvm;
MAP(C4, 36) \
MAP(C8, 37) \
MAP(C9, 38) \
- MAP(E8, 39) \
- MAP(F0, 40) \
- MAP(F8, 41) \
- MAP(F9, 42) \
- MAP(D0, 45) \
- MAP(D1, 46) \
- MAP(D4, 47) \
- MAP(D5, 48) \
- MAP(D6, 49) \
- MAP(D8, 50) \
- MAP(D9, 51) \
- MAP(DA, 52) \
- MAP(DB, 53) \
- MAP(DC, 54) \
- MAP(DD, 55) \
- MAP(DE, 56) \
- MAP(DF, 57)
+ MAP(CA, 39) \
+ MAP(CB, 40) \
+ MAP(E8, 41) \
+ MAP(F0, 42) \
+ MAP(F8, 45) \
+ MAP(F9, 46) \
+ MAP(D0, 47) \
+ MAP(D1, 48) \
+ MAP(D4, 49) \
+ MAP(D5, 50) \
+ MAP(D6, 51) \
+ MAP(D8, 52) \
+ MAP(D9, 53) \
+ MAP(DA, 54) \
+ MAP(DB, 55) \
+ MAP(DC, 56) \
+ MAP(DD, 57) \
+ MAP(DE, 58) \
+ MAP(DF, 59)
// A clone of X86 since we can't depend on something that is generated.
namespace X86Local {