diff options
author | Christopher Lamb <christopher.lamb@gmail.com> | 2008-03-16 03:12:01 +0000 |
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committer | Christopher Lamb <christopher.lamb@gmail.com> | 2008-03-16 03:12:01 +0000 |
commit | c9298235251b014e86a7368d92b589d093acb64a (patch) | |
tree | 11c2e0c245fb52c02a65e3e9469f5f83e94abaee /utils/TableGen/CodeGenTarget.cpp | |
parent | 606c5aa084041eb5ad60710728098eaf9c997315 (diff) |
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
-rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index e41f75a68a..da34ebf38e 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -309,6 +309,11 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> throw "Could not find 'IMPLICIT_DEF' instruction!"; const CodeGenInstruction *IMPLICIT_DEF = &I->second; + I = getInstructions().find("SUBREG_TO_REG"); + if (I == Instructions.end()) + throw "Could not find 'SUBREG_TO_REG' instruction!"; + const CodeGenInstruction *SUBREG_TO_REG = &I->second; + // Print out the rest of the instructions now. NumberedInstructions.push_back(PHI); NumberedInstructions.push_back(INLINEASM); @@ -317,6 +322,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> NumberedInstructions.push_back(EXTRACT_SUBREG); NumberedInstructions.push_back(INSERT_SUBREG); NumberedInstructions.push_back(IMPLICIT_DEF); + NumberedInstructions.push_back(SUBREG_TO_REG); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && @@ -324,7 +330,8 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> &II->second != DECLARE && &II->second != EXTRACT_SUBREG && &II->second != INSERT_SUBREG && - &II->second != IMPLICIT_DEF) + &II->second != IMPLICIT_DEF && + &II->second != SUBREG_TO_REG) NumberedInstructions.push_back(&II->second); } |