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| author | Evan Cheng <evan.cheng@apple.com> | 2007-03-19 06:20:37 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-03-19 06:20:37 +0000 |
| commit | 04677a3b49b2dfb151c4f77345702da489293627 (patch) | |
| tree | 7fc3345f8069c5424c70238a897a5c75691f3cdc /utils/TableGen/CodeGenTarget.cpp | |
| parent | 5d5c93f659dd3f09375ea0fbe5d6c2df64791f73 (diff) | |
Recognize target instruction flag 'isReMaterializable'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index d29ce514be..a261871861 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -356,6 +356,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress"); isCommutable = R->getValueAsBit("isCommutable"); isTerminator = R->getValueAsBit("isTerminator"); + isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); |