diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
| commit | 54c47c1ce94b9e549ef768e80fd004788d13ce85 (patch) | |
| tree | 6e6092299320c03acddf968e617778dccca01e20 /utils/TableGen/CodeGenRegisters.cpp | |
| parent | 4b2a174e21b7cfc2c45db895efc7c638e4c68538 (diff) | |
Remove MethodProtos/MethodBodies and allocation_order_begin/end.
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.
The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.
It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenRegisters.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index 6b877826f4..e940b8628d 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -225,8 +225,6 @@ CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) SpillAlignment = R->getValueAsInt("Alignment"); CopyCost = R->getValueAsInt("CopyCost"); Allocatable = R->getValueAsBit("isAllocatable"); - MethodBodies = R->getValueAsCode("MethodBodies"); - MethodProtos = R->getValueAsCode("MethodProtos"); AltOrderSelect = R->getValueAsCode("AltOrderSelect"); } |