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authorPetar Jovanovic <petar.jovanovic@rt-rk.com>2013-10-11 03:35:47 +0200
committerPetar Jovanovic <petar.jovanovic@rt-rk.com>2013-10-11 03:35:47 +0200
commitcf1867ae88e6bcac7061ae89694dbc44000e421e (patch)
treead389e1e25510928f1f859ccc24ab75411cf0124 /test
parent24882e3c7fe112de7540242ad91e96328ec4bb63 (diff)
Apply upstream: [mips] Fix a bug in MipsLongBranch::replaceBranch
Cherry-pick r191978 from upstream. Original commit message: Author: Akira Hatanaka <ahatanaka@mips.com> Date: Fri Oct 4 20:51:40 2013 +0000 [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasing instructions in delay slots along with the original branch instructions This has to be cherrypicked, as it is a bug in backend. It was exposed in a long function inside of llc, which caused llc.nexe to work incorrectly. TBR= mseaborn@chromium.org, dschuff@chromium.org BUG= bug in MIPS backend Review URL: https://codereview.chromium.org/26933005
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/Mips/longbranch.ll8
1 files changed, 6 insertions, 2 deletions
diff --git a/test/CodeGen/Mips/longbranch.ll b/test/CodeGen/Mips/longbranch.ll
index 1a4f79c191..af192d0e92 100644
--- a/test/CodeGen/Mips/longbranch.ll
+++ b/test/CodeGen/Mips/longbranch.ll
@@ -1,13 +1,17 @@
-; RUN: llc -march=mipsel -force-mips-long-branch < %s | FileCheck %s -check-prefix=O32
-; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 -force-mips-long-branch < %s | FileCheck %s -check-prefix=N64
+; RUN: llc -march=mipsel -force-mips-long-branch -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=O32
+; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 -force-mips-long-branch -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=N64
@g0 = external global i32
define void @foo1(i32 %s) nounwind {
entry:
+; O32: nop
+; O32: addiu $sp, $sp, -8
; O32: bal
; O32: lui $1, 0
; O32: addiu $1, $1, {{[0-9]+}}
+; N64: nop
+; N64: daddiu $sp, $sp, -16
; N64: lui $1, 0
; N64: daddiu $1, $1, 0
; N64: dsll $1, $1, 16