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authorJan Voung <jvoung@chromium.org>2013-06-25 13:53:13 -0700
committerJan Voung <jvoung@chromium.org>2013-06-25 13:53:13 -0700
commitf0392b56ec11466992bac898e12144a32b843077 (patch)
treefd7ce7d4677d1d50b836395b309f5972d9a340b6 /test/CodeGen/ARM/fast-isel-fold.ll
parent8811efb18b978645cf5ef8a88a9b57066c21ff1f (diff)
Revert "Apply upstream r183551, r183601, r183624 and r183794"
Revert this until we fix i1 sext. Currently, it uses LSL and ASR, which are pseudo-instructions and get dropped on the floor when generating .o files. We'll fix that, but for now revert to green the bots. BUG=https://code.google.com/p/nativeclient/issues/detail?id=3501 R=jfb@chromium.org Review URL: https://codereview.chromium.org/17715002
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-fold.ll')
-rw-r--r--test/CodeGen/ARM/fast-isel-fold.ll4
1 files changed, 0 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/fast-isel-fold.ll b/test/CodeGen/ARM/fast-isel-fold.ll
index e8ed8cbf34..38e1f884bf 100644
--- a/test/CodeGen/ARM/fast-isel-fold.ll
+++ b/test/CodeGen/ARM/fast-isel-fold.ll
@@ -9,11 +9,9 @@ define void @t1() nounwind uwtable ssp {
; ARM: t1
; ARM: ldrb
; ARM-NOT: uxtb
-; ARM-NOT: and{{.*}}, #255
; THUMB: t1
; THUMB: ldrb
; THUMB-NOT: uxtb
-; THUMB-NOT: and{{.*}}, #255
%1 = load i8* @a, align 1
call void @foo1(i8 zeroext %1)
ret void
@@ -38,11 +36,9 @@ define i32 @t3() nounwind uwtable ssp {
; ARM: t3
; ARM: ldrb
; ARM-NOT: uxtb
-; ARM-NOT: and{{.*}}, #255
; THUMB: t3
; THUMB: ldrb
; THUMB-NOT: uxtb
-; THUMB-NOT: and{{.*}}, #255
%1 = load i8* @a, align 1
%2 = zext i8 %1 to i32
ret i32 %2