diff options
author | Scott Michel <scottm@aero.org> | 2009-02-25 03:12:50 +0000 |
---|---|---|
committer | Scott Michel <scottm@aero.org> | 2009-02-25 03:12:50 +0000 |
commit | df38043a46b873acb98e7ce0c700d82c1d888772 (patch) | |
tree | da1fd9c994090c2be230ef879e0c94f9d8001248 /lib | |
parent | 0d52ff1f7b993750a74a5d4432273092de9af069 (diff) |
Remove all "cached" data from BuildVectorSDNode, preferring to retrieve
results via reference parameters.
This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65426 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 21 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 12 |
2 files changed, 14 insertions, 19 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 358c9703a8..12534308ad 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4856,27 +4856,25 @@ MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, BuildVectorSDNode::BuildVectorSDNode(MVT vecVT, DebugLoc dl, const SDValue *Elts, unsigned NumElts) - : SDNode(ISD::BUILD_VECTOR, dl, getSDVTList(vecVT), Elts, NumElts), - computedSplat(false), isSplatVector(false), hasUndefSplatBitsFlag(false), - SplatBits(0LL), SplatUndef(0LL), SplatSize(0) + : SDNode(ISD::BUILD_VECTOR, dl, getSDVTList(vecVT), Elts, NumElts) { } -bool BuildVectorSDNode::isConstantSplat(int MinSplatBits) { +bool BuildVectorSDNode::isConstantSplat(bool &hasUndefSplatBitsFlag, + uint64_t &SplatBits, + uint64_t &SplatUndef, + unsigned &SplatSize, + int MinSplatBits) { unsigned int nOps = getNumOperands(); assert(nOps > 0 && "isConstantSplat has 0-size build vector"); - // Return early if we already know the answer: - if (computedSplat) - return isSplatVector; + // Assume that this isn't a constant splat. + bool isSplatVector = false; // The vector's used (non-undef) bits uint64_t VectorBits[2] = { 0, 0 }; // The vector's undefined bits uint64_t UndefBits[2] = { 0, 0 }; - // Assume that this isn't a constant splat. - isSplatVector = false; - // Gather the constant and undefined bits unsigned EltBitSize = getOperand(0).getValueType().getSizeInBits(); for (unsigned i = 0; i < nOps; ++i) { @@ -4901,7 +4899,6 @@ bool BuildVectorSDNode::isConstantSplat(int MinSplatBits) { EltBits = DoubleToBits(apf.convertToDouble()); } else { // Nonconstant element -> not a splat. - computedSplat = true; return isSplatVector; } @@ -4910,7 +4907,6 @@ bool BuildVectorSDNode::isConstantSplat(int MinSplatBits) { if ((VectorBits[0] & ~UndefBits[1]) != (VectorBits[1] & ~UndefBits[0])) { // Can't be a splat if two pieces don't match. - computedSplat = true; return isSplatVector; } @@ -4954,7 +4950,6 @@ bool BuildVectorSDNode::isConstantSplat(int MinSplatBits) { isSplatVector = true; } - computedSplat = true; return isSplatVector; } diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 83683808eb..6af60da36c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3171,16 +3171,16 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); assert(BVN != 0 && "Expected a BuildVectorSDNode in LowerBUILD_VECTOR"); + uint64_t SplatBits; + uint64_t SplatUndef; + unsigned SplatSize; + bool HasAnyUndefs; + // If this is a splat (repetition) of a value across the whole vector, return // the smallest size that splats it. For example, "0x01010101010101..." is a // splat of 0x01, 0x0101, and 0x01010101. We return SplatBits = 0x01 and // SplatSize = 1 byte. - if (BVN->isConstantSplat()) { - uint64_t SplatBits = BVN->getSplatBits(); - uint64_t SplatUndef = BVN->getSplatUndef(); - unsigned SplatSize = BVN->getSplatSize(); - bool HasAnyUndefs = BVN->hasAnyUndefBits(); - + if (BVN->isConstantSplat(HasAnyUndefs, SplatBits, SplatUndef, SplatSize)) { // First, handle single instruction cases. // All zeros? |