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authorChris Lattner <sabre@nondot.org>2006-09-04 04:14:57 +0000
committerChris Lattner <sabre@nondot.org>2006-09-04 04:14:57 +0000
commit1911fd4f85aebcd4d7b8f27313c5a363eebf49cb (patch)
tree56477a21ba8925f2c2f1868f0e1ec2229349a50b /lib
parentdd842e12e1a054256314d36f3cab3d59da39fc68 (diff)
Completely rearchitect the interface between targets and the pass manager.
This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/ExecutionEngine/JIT/JIT.cpp10
-rw-r--r--lib/Target/ARM/ARMTargetMachine.cpp56
-rw-r--r--lib/Target/ARM/ARMTargetMachine.h9
-rw-r--r--lib/Target/Alpha/AlphaJITInfo.h6
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.cpp93
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.h18
-rw-r--r--lib/Target/CBackend/CBackend.cpp6
-rw-r--r--lib/Target/CBackend/CTargetMachine.h8
-rw-r--r--lib/Target/CBackend/Writer.cpp6
-rw-r--r--lib/Target/IA64/IA64TargetMachine.cpp84
-rw-r--r--lib/Target/IA64/IA64TargetMachine.h15
-rw-r--r--lib/Target/PowerPC/PPC.h10
-rw-r--r--lib/Target/PowerPC/PPCJITInfo.h6
-rw-r--r--lib/Target/PowerPC/PPCMachOWriter.cpp2
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.cpp119
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.h16
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.cpp61
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.h11
-rw-r--r--lib/Target/X86/X86.h4
-rw-r--r--lib/Target/X86/X86ELFWriter.cpp2
-rw-r--r--lib/Target/X86/X86JITInfo.h6
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp132
-rw-r--r--lib/Target/X86/X86TargetMachine.h20
23 files changed, 174 insertions, 526 deletions
diff --git a/lib/ExecutionEngine/JIT/JIT.cpp b/lib/ExecutionEngine/JIT/JIT.cpp
index fe5309558c..0a5423ef9d 100644
--- a/lib/ExecutionEngine/JIT/JIT.cpp
+++ b/lib/ExecutionEngine/JIT/JIT.cpp
@@ -58,18 +58,18 @@ JIT::JIT(ModuleProvider *MP, TargetMachine &tm, TargetJITInfo &tji)
// Add target data
MutexGuard locked(lock);
- FunctionPassManager& PM = state.getPM(locked);
+ FunctionPassManager &PM = state.getPM(locked);
PM.add(new TargetData(*TM.getTargetData()));
- // Compile LLVM Code down to machine code in the intermediate representation
- TJI.addPassesToJITCompile(PM);
-
// Turn the machine code intermediate representation into bytes in memory that
// may be executed.
- if (TM.addPassesToEmitMachineCode(PM, *MCE)) {
+ if (TM.addPassesToEmitMachineCode(PM, *MCE, false /*fast*/)) {
std::cerr << "Target does not support machine code emission!\n";
abort();
}
+
+ // Initialize passes.
+ PM.doInitialization();
}
JIT::~JIT() {
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index fe053c5605..175335f5c1 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -14,15 +14,9 @@
#include "ARMTargetMachine.h"
#include "ARMFrameInfo.h"
#include "ARM.h"
-#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include <iostream>
using namespace llvm;
namespace {
@@ -47,54 +41,16 @@ unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
return 0;
}
-/// addPassesToEmitFile - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
-///
-bool ARMTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType,
- bool Fast) {
- if (FileType != TargetMachine::AssemblyFile)
- return true;
-
- // Run loop strength reduction before anything else.
- if (!Fast)
- PM.add(createLoopStrengthReducePass());
-
- if (!Fast)
- PM.add(createCFGSimplificationPass());
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Print LLVM code input to instruction selector:
- if (PrintMachineCode)
- PM.add(new PrintFunctionPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+// Pass Pipeline Configuration
+bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
PM.add(createARMISelDag(*this));
-
- // Print machine instructions as they were initially generated.
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
- PM.add(createPrologEpilogCodeInserter());
-
- // Print machine instructions after register allocation and prolog/epilog
- // insertion.
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
+ return false;
+}
+bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out) {
// Output assembly language.
PM.add(createARMCodePrinterPass(Out, *this));
-
- // Delete the MachineInstrs we generated, since they're no longer needed.
- PM.add(createMachineCodeDeleter());
return false;
}
diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h
index 400ea0c7be..f09b92b8f3 100644
--- a/lib/Target/ARM/ARMTargetMachine.h
+++ b/lib/Target/ARM/ARMTargetMachine.h
@@ -18,7 +18,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/PassManager.h"
#include "ARMInstrInfo.h"
#include "ARMFrameInfo.h"
@@ -26,7 +25,7 @@ namespace llvm {
class Module;
-class ARMTargetMachine : public TargetMachine {
+class ARMTargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
ARMInstrInfo InstrInfo;
ARMFrameInfo FrameInfo;
@@ -41,8 +40,10 @@ public:
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
- virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType, bool Fast);
+ // Pass Pipeline Configuration
+ virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
+ virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out);
};
} // end namespace llvm
diff --git a/lib/Target/Alpha/AlphaJITInfo.h b/lib/Target/Alpha/AlphaJITInfo.h
index 7d1416ecf6..26c45b1256 100644
--- a/lib/Target/Alpha/AlphaJITInfo.h
+++ b/lib/Target/Alpha/AlphaJITInfo.h
@@ -29,12 +29,6 @@ namespace llvm {
AlphaJITInfo(TargetMachine &tm) : TM(tm)
{ useGOT = true; }
- /// addPassesToJITCompile - Add passes to the specified pass manager to
- /// implement a fast dynamic compiler for this target. Return true if this
- /// is not supported for this target.
- ///
- virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
virtual void *emitFunctionStub(void *Fn, MachineCodeEmitter &MCE);
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
virtual void relocate(void *Function, MachineRelocation *MR,
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index 2d7e467815..9c9f52dcf1 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -14,12 +14,8 @@
#include "AlphaJITInfo.h"
#include "AlphaTargetMachine.h"
#include "llvm/Module.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
+#include "llvm/PassManager.h"
#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/Debug.h"
-#include <iostream>
using namespace llvm;
@@ -57,89 +53,30 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
: DataLayout("e"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),
- Subtarget(M, FS)
-{
- DEBUG(std::cerr << "FS is " << FS << "\n");
+ Subtarget(M, FS) {
}
-/// addPassesToEmitFile - Add passes to the specified pass manager to implement
-/// a static compiler for this target.
-///
-bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM,
- std::ostream &Out,
- CodeGenFileType FileType,
- bool Fast) {
- if (FileType != TargetMachine::AssemblyFile) return true;
- PM.add(createLoopStrengthReducePass());
- PM.add(createCFGSimplificationPass());
-
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
+bool AlphaTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
PM.add(createAlphaISelDag(*this));
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createPrologEpilogCodeInserter());
-
- // Must run branch selection immediately preceding the asm printer
- //PM.add(createAlphaBranchSelectionPass());
-
- PM.add(createAlphaCodePrinterPass(Out, *this));
-
- PM.add(createMachineCodeDeleter());
return false;
}
-
-void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
-
- PM.add(createLoopStrengthReducePass());
- PM.add(createCFGSimplificationPass());
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- PM.add(createAlphaISelDag(TM));
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createPrologEpilogCodeInserter());
-
+bool AlphaTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer
//PM.add(createAlphaBranchSelectionPass());
-
+ return false;
}
-
-bool AlphaTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
- MachineCodeEmitter &MCE) {
+bool AlphaTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out) {
+ PM.add(createAlphaCodePrinterPass(Out, *this));
+ return false;
+}
+bool AlphaTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+ MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE));
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
return false;
}
diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h
index 413a99464a..d71c7cec72 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.h
+++ b/lib/Target/Alpha/AlphaTargetMachine.h
@@ -17,7 +17,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/PassManager.h"
#include "AlphaInstrInfo.h"
#include "AlphaJITInfo.h"
#include "AlphaSubtarget.h"
@@ -26,7 +25,7 @@ namespace llvm {
class GlobalValue;
-class AlphaTargetMachine : public TargetMachine {
+class AlphaTargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
AlphaInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
@@ -48,14 +47,15 @@ public:
}
static unsigned getJITMatchQuality();
-
- virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
- MachineCodeEmitter &MCE);
-
- virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType, bool Fast);
-
static unsigned getModuleMatchQuality(const Module &M);
+
+ // Pass Pipeline Configuration
+ virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
+ virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
+ virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out);
+ virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+ MachineCodeEmitter &MCE);
};
} // end namespace llvm
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index cbd13601a3..c50b5a40e9 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -2027,8 +2027,10 @@ void CWriter::visitVAArgInst(VAArgInst &I) {
// External Interface declaration
//===----------------------------------------------------------------------===//
-bool CTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &o,
- CodeGenFileType FileType, bool Fast) {
+bool CTargetMachine::addPassesToEmitWholeFile(PassManager &PM,
+ std::ostream &o,
+ CodeGenFileType FileType,
+ bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
PM.add(createLowerGCPass());
diff --git a/lib/Target/CBackend/CTargetMachine.h b/lib/Target/CBackend/CTargetMachine.h
index 1dde6fe236..38c738ebc3 100644
--- a/lib/Target/CBackend/CTargetMachine.h
+++ b/lib/Target/CBackend/CTargetMachine.h
@@ -25,14 +25,14 @@ struct CTargetMachine : public TargetMachine {
CTargetMachine(const Module &M, const std::string &FS)
: DataLayout(&M) {}
- // This is the only thing that actually does anything here.
- virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType, bool Fast);
+ virtual bool WantsWholeFile() const { return true; }
+ virtual bool addPassesToEmitWholeFile(PassManager &PM, std::ostream &Out,
+ CodeGenFileType FileType, bool Fast);
// This class always works, but shouldn't be the default in most cases.
static unsigned getModuleMatchQuality(const Module &M) { return 1; }
- virtual const TargetData *getTargetData() const { return &DataLayout; }
+ virtual const TargetData *getTargetData() const { return &DataLayout; }
};
} // End llvm namespace
diff --git a/lib/Target/CBackend/Writer.cpp b/lib/Target/CBackend/Writer.cpp
index cbd13601a3..c50b5a40e9 100644
--- a/lib/Target/CBackend/Writer.cpp
+++ b/lib/Target/CBackend/Writer.cpp
@@ -2027,8 +2027,10 @@ void CWriter::visitVAArgInst(VAArgInst &I) {
// External Interface declaration
//===----------------------------------------------------------------------===//
-bool CTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &o,
- CodeGenFileType FileType, bool Fast) {
+bool CTargetMachine::addPassesToEmitWholeFile(PassManager &PM,
+ std::ostream &o,
+ CodeGenFileType FileType,
+ bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
PM.add(createLowerGCPass());
diff --git a/lib/Target/IA64/IA64TargetMachine.cpp b/lib/Target/IA64/IA64TargetMachine.cpp
index c512ce6781..0f7821f5af 100644
--- a/lib/Target/IA64/IA64TargetMachine.cpp
+++ b/lib/Target/IA64/IA64TargetMachine.cpp
@@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
-// This file defines the IA64 specific subclass of TargetMachine.
+// This file implements the IA64 specific subclass of TargetMachine.
//
//===----------------------------------------------------------------------===//
@@ -15,14 +15,7 @@
#include "IA64.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/ADT/Statistic.h"
-#include <iostream>
using namespace llvm;
/// IA64TargetMachineModule - Note that this is used on hosts that cannot link
@@ -33,14 +26,6 @@ extern "C" int IA64TargetMachineModule;
int IA64TargetMachineModule = 0;
namespace {
- cl::opt<bool> DisableOutput("disable-ia64-llc-output", cl::Hidden,
- cl::desc("Disable the IA64 asm printer, for use "
- "when profiling the code generator."));
-
- cl::opt<bool> EnableDAGIsel("enable-ia64-dag-isel", cl::Hidden,
- cl::desc("Enable the IA64 DAG->DAG isel"));
-
- // Register the target.
RegisterTarget<IA64TargetMachine> X("ia64", " IA-64 (Itanium)");
}
@@ -76,65 +61,24 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
TLInfo(*this) { // FIXME? check this stuff
}
-// addPassesToEmitFile - We currently use all of the same passes as the JIT
-// does to emit statically compiled machine code.
-bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
- std::ostream &Out,
- CodeGenFileType FileType,
- bool Fast) {
- if (FileType != TargetMachine::AssemblyFile) return true;
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
- // bytes and must be 16byte aligned
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
- // Add an instruction selector
-// FIXME: reap this option one day: if(EnableDAGIsel)
+bool IA64TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
PM.add(createIA64DAGToDAGInstructionSelector(*this));
-
-/* XXX not yet. ;)
- // Run optional SSA-based machine code optimizations next...
- if (!NoSSAPeephole)
- PM.add(createIA64SSAPeepholeOptimizerPass());
-*/
-
- // Print the instruction selected machine code...
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // Perform register allocation to convert to a concrete IA64 representation
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- // Insert prolog/epilog code. Eliminate abstract frame index references...
- PM.add(createPrologEpilogCodeInserter());
-
-/* XXX no, not just yet */
-// PM.add(createIA64PeepholeOptimizerPass());
+ return false;
+}
+bool IA64TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
// Make sure everything is bundled happily
PM.add(createIA64BundlingPass(*this));
-
- if (PrintMachineCode) // Print the register-allocated code
- PM.add(createIA64CodePrinterPass(std::cerr, *this));
-
- if (!DisableOutput)
- PM.add(createIA64CodePrinterPass(Out, *this));
-
- // Delete machine code for this function
- PM.add(createMachineCodeDeleter());
-
- return false; // success!
+ return true;
+}
+bool IA64TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out) {
+ PM.add(createIA64CodePrinterPass(Out, *this));
+ return false;
}
diff --git a/lib/Target/IA64/IA64TargetMachine.h b/lib/Target/IA64/IA64TargetMachine.h
index 267d354117..5a4b6b6995 100644
--- a/lib/Target/IA64/IA64TargetMachine.h
+++ b/lib/Target/IA64/IA64TargetMachine.h
@@ -11,19 +11,18 @@
//
//===----------------------------------------------------------------------===//
-#ifndef IA64TARGETMACHINE_H
-#define IA64TARGETMACHINE_H
+#ifndef LLVM_TARGET_IA64TARGETMACHINE_H
+#define LLVM_TARGET_IA64TARGETMACHINE_H
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/PassManager.h"
#include "IA64InstrInfo.h"
#include "IA64ISelLowering.h"
namespace llvm {
-class IA64TargetMachine : public TargetMachine {
+class IA64TargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
IA64InstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
@@ -42,11 +41,13 @@ public:
}
virtual const TargetData *getTargetData() const { return &DataLayout; }
- virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType, bool Fast);
-
static unsigned getModuleMatchQuality(const Module &M);
+ // Pass Pipeline Configuration
+ virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
+ virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
+ virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out);
};
} // End llvm namespace
diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index f34b9b08a0..26439bd094 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -1,4 +1,4 @@
-//===-- PowerPC.h - Top-level interface for PowerPC representation -*- C++ -*-//
+//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -12,15 +12,15 @@
//
//===----------------------------------------------------------------------===//
-#ifndef TARGET_POWERPC_H
-#define TARGET_POWERPC_H
+#ifndef LLVM_TARGET_POWERPC_H
+#define LLVM_TARGET_POWERPC_H
#include <iosfwd>
namespace llvm {
class PPCTargetMachine;
-class PassManager;
+class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;
@@ -29,7 +29,7 @@ FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createDarwinAsmPrinter(std::ostream &OS, PPCTargetMachine &TM);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
-void addPPCMachOObjectWriterPass(PassManager &FPM, std::ostream &o,
+void addPPCMachOObjectWriterPass(FunctionPassManager &FPM, std::ostream &o,
PPCTargetMachine &tm);
} // end namespace llvm;
diff --git a/lib/Target/PowerPC/PPCJITInfo.h b/lib/Target/PowerPC/PPCJITInfo.h
index 61ec4691cb..66ee0eef30 100644
--- a/lib/Target/PowerPC/PPCJITInfo.h
+++ b/lib/Target/PowerPC/PPCJITInfo.h
@@ -29,12 +29,6 @@ namespace llvm {
is64Bit = tmIs64Bit;
}
- /// addPassesToJITCompile - Add passes to the specified pass manager to
- /// implement a fast dynamic compiler for this target. Return true if this
- /// is not supported for this target.
- ///
- virtual void addPassesToJITCompile(FunctionPassManager &PM);
-
virtual void *emitFunctionStub(void *Fn, MachineCodeEmitter &MCE);
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
virtual void relocate(void *Function, MachineRelocation *MR,
diff --git a/lib/Target/PowerPC/PPCMachOWriter.cpp b/lib/Target/PowerPC/PPCMachOWriter.cpp
index 308e8b7775..a7da37127d 100644
--- a/lib/Target/PowerPC/PPCMachOWriter.cpp
+++ b/lib/Target/PowerPC/PPCMachOWriter.cpp
@@ -33,7 +33,7 @@ namespace {
/// addPPCMachOObjectWriterPass - Returns a pass that outputs the generated code
/// as a Mach-O object file.
///
-void llvm::addPPCMachOObjectWriterPass(PassManager &FPM,
+void llvm::addPPCMachOObjectWriterPass(FunctionPassManager &FPM,
std::ostream &O, PPCTargetMachine &TM) {
PPCMachOWriter *EW = new PPCMachOWriter(O, TM);
FPM.add(EW);
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 811e18992d..2e2fd28587 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -12,19 +12,10 @@
//===----------------------------------------------------------------------===//
#include "PPC.h"
-#include "PPCFrameInfo.h"
#include "PPCTargetMachine.h"
-#include "PPCJITInfo.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
-#include "llvm/Analysis/Verifier.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Support/CommandLine.h"
-#include <iostream>
using namespace llvm;
namespace {
@@ -106,99 +97,47 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
: PPCTargetMachine(M, FS, true) {
}
-/// addPassesToEmitFile - Add passes to the specified pass manager to implement
-/// a static compiler for this target.
-///
-bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
- CodeGenFileType FileType,
- bool Fast) {
- if (FileType != TargetMachine::AssemblyFile &&
- FileType != TargetMachine::ObjectFile) return true;
-
- // Run loop strength reduction before anything else.
- if (!Fast) PM.add(createLoopStrengthReducePass(&TLInfo));
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Clean up after other passes, e.g. merging critical edges.
- if (!Fast) PM.add(createCFGSimplificationPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
+bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
// Install an instruction selector.
PM.add(createPPCISelDag(*this));
+ return false;
+}
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createRegisterAllocator());
-
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
-
- PM.add(createPrologEpilogCodeInserter());
-
- // Must run branch selection immediately preceding the asm printer
+bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+
+ // Must run branch selection immediately preceding the asm printer.
PM.add(createPPCBranchSelectionPass());
-
- if (FileType == TargetMachine::AssemblyFile)
- PM.add(createDarwinAsmPrinter(Out, *this));
- else
- // FIXME: support PPC ELF files at some point
- addPPCMachOObjectWriterPass(PM, Out, *this);
-
- PM.add(createMachineCodeDeleter());
return false;
}
-void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // The JIT should use the static relocation model.
- TM.setRelocationModel(Reloc::Static);
-
- // Run loop strength reduction before anything else.
- PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
-
- // FIXME: Implement efficient support for garbage collection intrinsics.
- PM.add(createLowerGCPass());
-
- // FIXME: Implement the invoke/unwind instructions!
- PM.add(createLowerInvokePass());
-
- // Clean up after other passes, e.g. merging critical edges.
- PM.add(createCFGSimplificationPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- // Install an instruction selector.
- PM.add(createPPCISelDag(TM));
-
- PM.add(createRegisterAllocator());
- PM.add(createPrologEpilogCodeInserter());
-
- // Must run branch selection immediately preceding the asm printer
- PM.add(createPPCBranchSelectionPass());
+bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+ std::ostream &Out) {
+ PM.add(createDarwinAsmPrinter(Out, *this));
+ return false;
+}
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(&std::cerr));
+bool PPCTargetMachine::addObjectWriter(FunctionPassMan