Revert some ARM byval localmods since byval+varargs are not in stable pexes.

Localmods came from: https://codereview.chromium.org/10825082/, and earlier.

(1) The original change was so that byval parameters always
go on the stack. That part was added because the original
ARM code was buggy, and did not actually make a copy of the
value, modifying the caller's struct (ouch!).

(2) Then came a localmod to make all arguments following a
byval go on the stack and to make the var-args code aware of
that.  This is so that arguments stay in the correct order
for var-args to pick up.

For (1) there has been some work upstream to make it work
better.  In any case, clang with --target=armv7a-...-gnueabi
only used byval in some limited cases -- when the size of
the  struct is > 64 bytes where the backend will know
that part of it could be in regs, and the rest can be
memcpy'ed to the stack.

For le32, clang will still generate byval without
satisfying the same ARM condition (only for structs
bigger than 64 bytes), so it could be *very bad* if
we didn't have the ABI simpification passes rewrite
the byval and try to let the ARM backend do things
with byval...

TEST=the GCC torture tests: va-arg-4.c, and 20030914-2.c
and the example in issue 2746 still pass.

BUG=none, cleanup
R=dschuff@chromium.org

Review URL: https://codereview.chromium.org/23691009

3 files changed, 0 insertions, 37 deletions

diff --git a/lib/CodeGen/CallingConvLower.cpp b/lib/CodeGen/CallingConvLower.cpp
index d4cc1a8654..75f4b96e3b 100644
--- a/lib/CodeGen/CallingConvLower.cpp
+++ b/lib/CodeGen/CallingConvLower.cpp
@@ -33,7 +33,6 @@ CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
   StackOffset = 0;
 
   clearByValRegsInfo();
-  clearHasByValInRegPosition(); // @LOCALMOD.
   UsedRegs.resize((TRI.getNumRegs()+31)/32);
 }
 
diff --git a/lib/Target/ARM/ARMCallingConv.td b/lib/Target/ARM/ARMCallingConv.td
index b051d88534..1a41448149 100644
--- a/lib/Target/ARM/ARMCallingConv.td
+++ b/lib/Target/ARM/ARMCallingConv.td
@@ -105,10 +105,6 @@ def CC_ARM_APCS_GHC : CallingConv<[
 
 def CC_ARM_AAPCS_Common : CallingConv<[
 
-  // @LOCALMOD-BEGIN (PR11018)
-  CCIfByVal<CCPassByVal<4, 4>>,
-  // @LOCALMOD-END
-
   CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
 
   // i64/f64 is passed in even pairs of GPRs
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index df7615df17..57c247901c 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1795,30 +1795,6 @@ ARMTargetLowering::HandleByVal(
           State->getCallOrPrologue() == Call) &&
          "unhandled ParmContext");
 
-  // @LOCALMOD-BEGIN
-  // The original mechanism tries to split a byval argument between registers
-  // and the stack.  It doesn't work correctly yet, so disable it.
-  // This leaves the entire byval argument on the stack, and the rest
-  // of the parameters will need to be on the stack as well, to have
-  // the correct order for var-args.  We remember the fact that there was
-  // a byval param that forced this, so that we know not to use the
-  // handle var-args reg-save area.
-  // PR11018.
-  if (Subtarget->isTargetNaCl()) {
-    unsigned ByValArgsCount = State->getInRegsParamsCount();
-    unsigned CurByValIndex = State->getInRegsParamsProceed();
-    if ((CurByValIndex >= ByValArgsCount) &&
-        (ARM::R0 <= reg) && (reg <= ARM::R3)) {
-      State->setHasByValInRegPosition();
-    }
-    // Confiscate any remaining parameter registers to preclude their
-    // assignment to subsequent parameters.
-    while (State->AllocateReg(GPRArgRegs, 4))
-      ;
-    return;
-  }
-  // @LOCALMOD-END
-
   // For in-prologue parameters handling, we also introduce stack offset
   // for byval registers: see CallingConvLower.cpp, CCState::HandleByVal.
   // This behaviour outsides AAPCS rules (5.5 Parameters Passing) of how
@@ -2868,10 +2844,6 @@ ARMTargetLowering::computeRegArea(CCState &CCInfo, MachineFunction &MF,
     unsigned RBegin, REnd;
     CCInfo.getInRegsParamInfo(InRegsParamRecordIdx, RBegin, REnd);
     NumGPRs = REnd - RBegin;
-    // @LOCALMOD-BEGIN
-  } else if (Subtarget->isTargetNaCl() && CCInfo.hasByValInRegPosition()) {
-    NumGPRs = 0;
-    // @LOCALMOD-END
   } else {
     unsigned int firstUnalloced;
     firstUnalloced = CCInfo.getFirstUnallocated(GPRArgRegs,
@@ -2922,10 +2894,6 @@ ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
     CCInfo.getInRegsParamInfo(InRegsParamRecordIdx, RBegin, REnd);
     firstRegToSaveIndex = RBegin - ARM::R0;
     lastRegToSaveIndex = REnd - ARM::R0;
-  // @LOCALMOD-BEGIN
-  } else if (Subtarget->isTargetNaCl() && CCInfo.hasByValInRegPosition()) {
-    firstRegToSaveIndex = 4; // Nothing to save.
-  // @LOCALMOD-END
   } else {
     firstRegToSaveIndex = CCInfo.getFirstUnallocated
       (GPRArgRegs, sizeof(GPRArgRegs) / sizeof(GPRArgRegs[0]));