diff options
author | Chris Lattner <sabre@nondot.org> | 2010-09-11 16:32:12 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-09-11 16:32:12 +0000 |
commit | ee211d0ed632d6329922ad4c5f7a25d3d66cf551 (patch) | |
tree | 6fc864ebd12c076af710b65a090c0ae2443d52ed /lib | |
parent | cbf8a98c7c652e96967623c80cb945fef001b090 (diff) |
implement rdar://8407928 - support for in/out with a missing "a" register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113689 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index a6b2b77a4a..e6f0d9561a 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -811,7 +811,8 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, if (getLexer().is(AsmToken::EndOfStatement)) Parser.Lex(); // Consume the EndOfStatement - // FIXME: Hack to handle recognizing s{hr,ar,hl}? $1. + // FIXME: Hack to handle recognize s{hr,ar,hl} <op>, $1. Canonicalize to + // "shift <op>". if ((Name.startswith("shr") || Name.startswith("sar") || Name.startswith("shl")) && Operands.size() == 3) { @@ -823,6 +824,37 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, } } + // FIXME: Hack to handle recognize "in[bwl] <op>". Canonicalize it to + // "inb <op>, %al". + if ((Name == "inb" || Name == "inw" || Name == "inl") && + Operands.size() == 2) { + unsigned Reg; + if (Name[2] == 'b') + Reg = MatchRegisterName("al"); + else if (Name[2] == 'w') + Reg = MatchRegisterName("ax"); + else + Reg = MatchRegisterName("eax"); + SMLoc Loc = Operands.back()->getEndLoc(); + Operands.push_back(X86Operand::CreateReg(Reg, Loc, Loc)); + } + + // FIXME: Hack to handle recognize "out[bwl] <op>". Canonicalize it to + // "outb %al, <op>". + if ((Name == "outb" || Name == "outw" || Name == "outl") && + Operands.size() == 2) { + unsigned Reg; + if (Name[3] == 'b') + Reg = MatchRegisterName("al"); + else if (Name[3] == 'w') + Reg = MatchRegisterName("ax"); + else + Reg = MatchRegisterName("eax"); + SMLoc Loc = Operands.back()->getEndLoc(); + Operands.push_back(X86Operand::CreateReg(Reg, Loc, Loc)); + std::swap(Operands[1], Operands[2]); + } + // FIXME: Hack to handle "f{mul*,add*,sub*,div*} $op, st(0)" the same as // "f{mul*,add*,sub*,div*} $op" if ((Name.startswith("fmul") || Name.startswith("fadd") || |