aboutsummaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2010-09-14 21:12:05 +0000
committerBob Wilson <bob.wilson@apple.com>2010-09-14 21:12:05 +0000
commitfe3ac088ee0a536f60b3c30ad97703d5d6cd2167 (patch)
tree725df8f5f4816f7deb51d538878105151d6dc098 /lib
parentf3f09527e6484143fcdef2ddfef0b2f016881e36 (diff)
Avoid warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113857 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/ARMExpandPseudoInsts.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 9dbf29d85a..79fcfe8d1c 100644
--- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -450,8 +450,9 @@ void ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) {
}
assert(Lane < RegElts && "out of range lane for VLD/VST-lane");
- unsigned DstReg, D0, D1, D2, D3;
- bool DstIsDead;
+ unsigned D0, D1, D2, D3;
+ unsigned DstReg = 0;
+ bool DstIsDead = false;
if (TableEntry->IsLoad) {
DstIsDead = MI.getOperand(OpIdx).isDead();
DstReg = MI.getOperand(OpIdx++).getReg();