diff options
| author | Eli Friedman <eli.friedman@gmail.com> | 2011-10-10 22:28:47 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-10-10 22:28:47 +0000 |
| commit | dca62d53b74164364b3eaa58df3a284cf86fa016 (patch) | |
| tree | 6b538f4b29780d61b7b5d49a2e9e83a5740143d3 /lib | |
| parent | e2f2f07be7cf2b55b7e5501291bbcede87e43fd6 (diff) | |
Make sure the X86 backend doesn't explode on 128-bit shuffles in AVX mode. Fixes PR11102.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141585 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 02c9f8ef22..5bd3e2b671 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3757,12 +3757,8 @@ static bool isVPERMILPDMask(const SmallVectorImpl<int> &Mask, EVT VT, if (!Subtarget->hasAVX()) return false; - // Match any permutation of 128-bit vector with 64-bit types - if (NumLanes == 1 && NumElts != 2) - return false; - - // Only match 256-bit with 32 types - if (VT.getSizeInBits() == 256 && NumElts != 4) + // Only match 256-bit with 64-bit types + if (VT.getSizeInBits() != 256 || NumElts != 4) return false; // The mask on the high lane is independent of the low. Both can match @@ -3793,12 +3789,8 @@ static bool isVPERMILPSMask(const SmallVectorImpl<int> &Mask, EVT VT, if (!Subtarget->hasAVX()) return false; - // Match any permutation of 128-bit vector with 32-bit types - if (NumLanes == 1 && NumElts != 4) - return false; - - // Only match 256-bit with 32 types - if (VT.getSizeInBits() == 256 && NumElts != 8) + // Only match 256-bit with 32-bit types + if (VT.getSizeInBits() != 256 || NumElts != 8) return false; // The mask on the high lane should be the same as the low. Actually, |