diff options
author | Chris Lattner <sabre@nondot.org> | 2008-02-27 05:57:41 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2008-02-27 05:57:41 +0000 |
commit | b09916bdfbd7ffdc8fbadb5ee0c0b50567823f46 (patch) | |
tree | 82b26d049ca1b0873011990f2b19c852a663bf65 /lib | |
parent | 22eedf4eec990f90988af819c034787019440cbd (diff) |
Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead
stack slot and store if the SINT_TO_FP is actually legal. This allows
us to compile:
double a(double b) {return (unsigned)b;}
to:
_a:
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
ret
instead of:
_a:
subq $8, %rsp
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
addq $8, %rsp
ret
crazy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/README-X86-64.txt | 15 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 26 |
2 files changed, 12 insertions, 29 deletions
diff --git a/lib/Target/X86/README-X86-64.txt b/lib/Target/X86/README-X86-64.txt index efe3b73da5..359b83d01a 100644 --- a/lib/Target/X86/README-X86-64.txt +++ b/lib/Target/X86/README-X86-64.txt @@ -236,18 +236,3 @@ on the result of the movb). //===---------------------------------------------------------------------===// -This function: -double a(double b) {return (unsigned)b;} -compiles to this code: - -_a: - subq $8, %rsp - cvttsd2siq %xmm0, %rax - movl %eax, %eax - cvtsi2sdq %rax, %xmm0 - addq $8, %rsp - ret - -note the dead rsp adjustments. - -//===---------------------------------------------------------------------===// diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index df30aa545e..50014b3182 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4148,12 +4148,17 @@ SDOperand X86TargetLowering::LowerShift(SDOperand Op, SelectionDAG &DAG) { } SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getOperand(0).getValueType() <= MVT::i64 && - Op.getOperand(0).getValueType() >= MVT::i16 && - "Unknown SINT_TO_FP to lower!"); - - SDOperand Result; MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); + assert(SrcVT <= MVT::i64 && SrcVT >= MVT::i16 && + "Unknown SINT_TO_FP to lower!"); + + // These are really Legal; caller falls through into that case. + if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType())) + return SDOperand(); + if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 && + Subtarget->is64Bit()) + return SDOperand(); + unsigned Size = MVT::getSizeInBits(SrcVT)/8; MachineFunction &MF = DAG.getMachineFunction(); int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); @@ -4163,13 +4168,6 @@ SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { PseudoSourceValue::getFixedStack(), SSFI); - // These are really Legal; caller falls through into that case. - if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType())) - return Result; - if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 && - Subtarget->is64Bit()) - return Result; - // Build the FILD SDVTList Tys; bool useSSE = isScalarFPTypeInSSEReg(Op.getValueType()); @@ -4181,8 +4179,8 @@ SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { Ops.push_back(Chain); Ops.push_back(StackSlot); Ops.push_back(DAG.getValueType(SrcVT)); - Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, - Tys, &Ops[0], Ops.size()); + SDOperand Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG : X86ISD::FILD, + Tys, &Ops[0], Ops.size()); if (useSSE) { Chain = Result.getValue(1); |