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authorDaniel Dunbar <daniel@zuster.org>2009-10-20 22:10:05 +0000
committerDaniel Dunbar <daniel@zuster.org>2009-10-20 22:10:05 +0000
commita7cc65283af74e8681522d4ede4d7c15d04f58e3 (patch)
tree3af58b504455b70b242240028aba30805b3db6f7 /lib
parent2bcf60a9cc435658ca8a02ee692af225599cf9e4 (diff)
Fix -Asserts warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84687 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
index bde15a94a9..f422798e31 100644
--- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
@@ -332,8 +332,9 @@ void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum) {
}
void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum){
- if (unsigned Reg = MI->getOperand(OpNum).getReg()) {
- assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
+ if (MI->getOperand(OpNum).getReg()) {
+ assert(MI->getOperand(OpNum).getReg() == ARM::CPSR &&
+ "Expect ARM CPSR register!");
O << 's';
}
}