diff options
author | Gabor Greif <ggreif@gmail.com> | 2010-09-15 16:53:07 +0000 |
---|---|---|
committer | Gabor Greif <ggreif@gmail.com> | 2010-09-15 16:53:07 +0000 |
commit | 7602993f2dc0a33d04cf5582cdf0cf515896ea7c (patch) | |
tree | 802a3a322e0c8073975c82b6e499df5103eba04f /lib | |
parent | 34327856d92d027733524b9418bd188a9e8db5db (diff) |
the darwin9-powerpc buildbot keeps consistently crashing,
backing out following to get it back to green,
so I can investigate in peace:
svn merge -c -113840 llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
svn merge -c -113876 -c -113839 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113980 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 315ddcbc7e..864c5f9dbb 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1352,20 +1352,6 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { SrcReg = MI->getOperand(0).getReg(); CmpValue = MI->getOperand(1).getImm(); return true; - case ARM::TSTri: { - if (&*MI->getParent()->begin() == MI) - return false; - const MachineInstr *AND = llvm::prior(MI); - if (AND->getOpcode() != ARM::ANDri) - return false; - if (MI->getOperand(0).getReg() == AND->getOperand(1).getReg() && - MI->getOperand(1).getImm() == AND->getOperand(2).getImm()) { - SrcReg = AND->getOperand(0).getReg(); - CmpValue = 0; - return true; - } - } - break; } return false; @@ -1415,8 +1401,6 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue, switch (MI->getOpcode()) { default: break; case ARM::ADDri: - case ARM::ANDri: - case ARM::t2ANDri: case ARM::SUBri: case ARM::t2ADDri: case ARM::t2SUBri: |