diff options
| author | Chris Lattner <sabre@nondot.org> | 2004-11-15 23:16:34 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-11-15 23:16:34 +0000 |
| commit | 36c625d3a597bc0126c06ce0ca5ddfe261b6bf60 (patch) | |
| tree | 66c523d580a5d24cfb1bdf79617347d3017b4510 /lib | |
| parent | ced6222bc5ae79e1dbdb36dc00648fb62727086a (diff) | |
Simplify and rearrange long shift code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17861 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 4e9e54261c..e890e6bb2f 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -2979,23 +2979,28 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB, DestReg).addReg(SrcReg ).addReg(SrcReg+1).addImm(Amount); BuildMI(*MBB, IP, Opc[2],2,DestReg+1).addReg(SrcReg+1).addImm(Amount); } - } else { // Shifting more than 32 bits - Amount -= 32; + } else if (Amount == 32) { if (isLeftShift) { - if (Amount != 0) { - BuildMI(*MBB, IP, X86::SHL32ri, 2, - DestReg + 1).addReg(SrcReg).addImm(Amount); - } else { - BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(SrcReg); - } + BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(SrcReg); BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg).addImm(0); } else { - if (Amount != 0) { - BuildMI(*MBB, IP, isSigned ? X86::SAR32ri : X86::SHR32ri, 2, - DestReg).addReg(SrcReg+1).addImm(Amount); + BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg).addReg(SrcReg); + if (!isSigned) { + BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0); } else { - BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg).addReg(SrcReg+1); + BuildMI(*MBB, IP, X86::SAR32ri, 2, + DestReg+1).addReg(SrcReg).addImm(31); } + } + } else { // Shifting more than 32 bits + Amount -= 32; + if (isLeftShift) { + BuildMI(*MBB, IP, X86::SHL32ri, 2, + DestReg + 1).addReg(SrcReg).addImm(Amount); + BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg).addImm(0); + } else { + BuildMI(*MBB, IP, isSigned ? X86::SAR32ri : X86::SHR32ri, 2, + DestReg).addReg(SrcReg+1).addImm(Amount); BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0); } } |