diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2010-03-16 21:25:05 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2010-03-16 21:25:05 +0000 |
| commit | 2b0272e43de501891f09068f0a562792d4881044 (patch) | |
| tree | 1040dad1e79561adee1648f8cb41532dec04563b /lib | |
| parent | 94c484d3b89662a9f61711f523f6b5cb9b6c392a (diff) | |
Disambiguate the *_UPD and * variants by specifying the writeback flag as 1.
This is for the disassembly work.
There are cases where this is not possible, for example, A8.6.53 LDM Encoding T1.
In such case, we'll use an adhoc approach to deduce the Opcode programmatically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98679 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 8 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrVFP.td | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 0547844bb9..53abf340ad 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1355,7 +1355,9 @@ def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), IndexModeUpd, LdStMulFrm, IIC_iLoadm, "ldm${addr:submode}${p}\t$addr!, $dsts", - "$addr.addr = $wb", []>; + "$addr.addr = $wb", []> { + let Inst{21} = 1; // wback +} } // mayLoad, hasExtraDefRegAllocReq let mayStore = 1, hasExtraSrcRegAllocReq = 1 in { @@ -1368,7 +1370,9 @@ def STM_UPD : AXI4st<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), IndexModeUpd, LdStMulFrm, IIC_iStorem, "stm${addr:submode}${p}\t$addr!, $srcs", - "$addr.addr = $wb", []>; + "$addr.addr = $wb", []> { + let Inst{21} = 1; // wback +} } // mayStore, hasExtraSrcRegAllocReq //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 1d5acc1d4d..68dff86ef6 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -96,6 +96,7 @@ def VLDMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, IndexModeUpd, IIC_fpLoadm, "vldm${addr:submode}${p}\t${addr:base}!, $dsts", "$addr.base = $wb", []> { + let Inst{21} = 1; // wback let Inst{20} = 1; } @@ -104,6 +105,7 @@ def VLDMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, IndexModeUpd, IIC_fpLoadm, "vldm${addr:submode}${p}\t${addr:base}!, $dsts", "$addr.base = $wb", []> { + let Inst{21} = 1; // wback let Inst{20} = 1; } } // mayLoad, hasExtraDefRegAllocReq @@ -126,6 +128,7 @@ def VSTMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, IndexModeUpd, IIC_fpStorem, "vstm${addr:submode}${p}\t${addr:base}!, $srcs", "$addr.base = $wb", []> { + let Inst{21} = 1; // wback let Inst{20} = 0; } @@ -134,6 +137,7 @@ def VSTMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, IndexModeUpd, IIC_fpStorem, "vstm${addr:submode}${p}\t${addr:base}!, $srcs", "$addr.base = $wb", []> { + let Inst{21} = 1; // wback let Inst{20} = 0; } } // mayStore, hasExtraSrcRegAllocReq |