Re-allow an x86-32 fast-isel optimization for NaCl / use shorter insts.

There was an old fix for r+r based memory references on
x86-64 that checked for isTargetNaCl() instead of
isTargetNaCl64(). This disabled some r+r for 32-bit.
However, fast isel only sets up r+r with geps, and we don't
have geps in the stable ABI.  We could potentially add
some similar pattern matching in the future...

The problem we *do* see with the current bitcode, is that
this change also made it preferred to use an index register
instead of a base register. This made the memory references
on x86-32 look like:

  cmpl ..., (,%eax,1)

instead of

  cmpl ..., (%eax)

So we had longer instructions.
Total zipped nexe sizes: 5.73MB (old) vs 5.59 MB (new) (2.5%)
Total not zipped: 17.28MB vs 16.28 MB (6%)

runtime diffs (min of 5 runs)
* eon 4.94 (old) vs 4.72 (new) (~4%)
* mesa 21.64 vs 21.08
* mcf 5.76 vs 5.60
* vortex 4.21 vs 4.05
* perlbmk 27.62 vs 26.55
(the rest were under 2% better)

BUG=https://code.google.com/p/nativeclient/issues/detail?id=3359
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/15047013

1 files changed, 5 insertions, 4 deletions

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index c7ffda4609..df3b87942a 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -676,10 +676,11 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
   // If all else fails, try to materialize the value in a register.
   if (!AM.GV || !Subtarget->isPICStyleRIPRel()) {
     // @LOCALMOD-START
-    if (Subtarget->isTargetNaCl()) {
-      // We can materialize into a memory address only if
-      // no registers have been defined (and hence, we
-      // aren't modifying an existing memory reference).
+    if (Subtarget->isTargetNaCl64()) {
+      // We are about use a register in an addressing mode. However, x86-64
+      // NaCl does not allow arbitrary r+r addressing. One of the regs must
+      // be %r15 (inserted by the NaClRewritePass). Check that we will only
+      // end up with one reg defined after this.
       if ((AM.Base.Reg == 0) && (AM.IndexReg == 0)) {
         // Put into index register so that the NaCl rewrite pass will
         // convert this to a 64-bit address.