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| author | Andrew Trick <atrick@apple.com> | 2012-06-22 02:50:33 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-06-22 02:50:33 +0000 |
| commit | e2b32bb20ee76f24708b3c9e19b6fbc651c25637 (patch) | |
| tree | 981bff3c8345d24cc47dba796d9d491d76cd5efa /lib/Transforms/Utils/CodeExtractor.cpp | |
| parent | ef2d9e59aba381c42e018df9c26f9025c1995a64 (diff) | |
ARM scheduling fix: don't guess at implicit operand latency.
This is a minor drive-by fix with no robust way to unit test.
As an example see neon-div.ll:
SU(16): %Q8<def> = VMOVLsv4i32 %D17, pred:14, pred:%noreg, %Q8<imp-use,kill>
val SU(1): Latency=2 Reg=%Q8
...should be latency=1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158960 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Utils/CodeExtractor.cpp')
0 files changed, 0 insertions, 0 deletions