diff options
| author | Frits van Bommel <fvbommel@gmail.com> | 2011-07-18 12:00:32 +0000 |
|---|---|---|
| committer | Frits van Bommel <fvbommel@gmail.com> | 2011-07-18 12:00:32 +0000 |
| commit | 39b5abf507b43da6b92f68b86406e0015ead18e9 (patch) | |
| tree | a06cdf80abf33dbfa6fbe90ed17da84cf784e094 /lib/Target | |
| parent | c48e1ef0e22b4113dd4dd48c5b170a19fe4d0188 (diff) | |
Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used.
Mostly mechanical with some manual reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135390 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 24 | ||||
| -rw-r--r-- | lib/Target/CBackend/CBackend.cpp | 4 |
2 files changed, 14 insertions, 14 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index ba422952ac..14b9a7017c 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -487,19 +487,19 @@ ARMBaseRegisterInfo::getRawAllocationOrder(const TargetRegisterClass *RC, if (!TFI->hasFP(MF)) { if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPREven1); + return makeArrayRef(GPREven1); else - return ArrayRef<unsigned>(GPREven4); + return makeArrayRef(GPREven4); } else if (FramePtr == ARM::R7) { if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPREven2); + return makeArrayRef(GPREven2); else - return ArrayRef<unsigned>(GPREven5); + return makeArrayRef(GPREven5); } else { // FramePtr == ARM::R11 if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPREven3); + return makeArrayRef(GPREven3); else - return ArrayRef<unsigned>(GPREven6); + return makeArrayRef(GPREven6); } } else if (HintType == ARMRI::RegPairOdd) { if (isPhysicalRegister(HintReg) && getRegisterPairOdd(HintReg, MF) == 0) @@ -509,19 +509,19 @@ ARMBaseRegisterInfo::getRawAllocationOrder(const TargetRegisterClass *RC, if (!TFI->hasFP(MF)) { if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPROdd1); + return makeArrayRef(GPROdd1); else - return ArrayRef<unsigned>(GPROdd4); + return makeArrayRef(GPROdd4); } else if (FramePtr == ARM::R7) { if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPROdd2); + return makeArrayRef(GPROdd2); else - return ArrayRef<unsigned>(GPROdd5); + return makeArrayRef(GPROdd5); } else { // FramePtr == ARM::R11 if (!STI.isR9Reserved()) - return ArrayRef<unsigned>(GPROdd3); + return makeArrayRef(GPROdd3); else - return ArrayRef<unsigned>(GPROdd6); + return makeArrayRef(GPROdd6); } } return RC->getRawAllocationOrder(MF); diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index f00fcc4cb0..c0d9c773d4 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -3559,7 +3559,7 @@ void CWriter::visitInsertValueInst(InsertValueInst &IVI) { i != e; ++i) { Type *IndexedTy = ExtractValueInst::getIndexedType(IVI.getOperand(0)->getType(), - ArrayRef<unsigned>(b, i+1)); + makeArrayRef(b, i+1)); if (IndexedTy->isArrayTy()) Out << ".array[" << *i << "]"; else @@ -3581,7 +3581,7 @@ void CWriter::visitExtractValueInst(ExtractValueInst &EVI) { i != e; ++i) { Type *IndexedTy = ExtractValueInst::getIndexedType(EVI.getOperand(0)->getType(), - ArrayRef<unsigned>(b, i+1)); + makeArrayRef(b, i+1)); if (IndexedTy->isArrayTy()) Out << ".array[" << *i << "]"; else |