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authorDevang Patel <dpatel@apple.com>2011-04-27 20:29:27 +0000
committerDevang Patel <dpatel@apple.com>2011-04-27 20:29:27 +0000
commit0be77dff1147488814b8eea6ec8619f56e3d9f5e (patch)
tree5d90f9907c77fa1aae927d8e89c89d48d1a8df52 /lib/Target
parent309db7c947de7f0f9730dff5f95bc1cc5bd1db7d (diff)
Revert r130178. It turned out to be not the optimal path to emit complex location expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130326 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/ARM/ARMAsmPrinter.cpp10
-rw-r--r--lib/Target/ARM/ARMAsmPrinter.h3
2 files changed, 5 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp
index 10cccda5e8..b8c117c2cb 100644
--- a/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -173,11 +173,10 @@ getDebugValueLocation(const MachineInstr *MI) const {
}
/// EmitDwarfRegOp - Emit dwarf register operation.
-void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
- unsigned ExtraExprSize) const {
+void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
const TargetRegisterInfo *RI = TM.getRegisterInfo();
if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1)
- AsmPrinter::EmitDwarfRegOp(MLoc, ExtraExprSize);
+ AsmPrinter::EmitDwarfRegOp(MLoc);
else {
unsigned Reg = MLoc.getReg();
if (Reg >= ARM::S0 && Reg <= ARM::S31) {
@@ -192,7 +191,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
OutStreamer.AddComment("Loc expr size");
// DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB
// 1 + ULEB(Rx) + 1 + 1 + 1
- EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx) + ExtraExprSize);
+ EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx));
OutStreamer.AddComment("DW_OP_regx for S register");
EmitInt8(dwarf::DW_OP_regx);
@@ -224,8 +223,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
// DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) +
// DW_OP_regx + ULEB + DW_OP_piece + ULEB(8);
// 6 + ULEB(D1) + ULEB(D2)
- EmitInt16(6 + MCAsmInfo::getULEB128Size(D1)
- + MCAsmInfo::getULEB128Size(D2) + ExtraExprSize);
+ EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2));
OutStreamer.AddComment("DW_OP_regx for Q register: D1");
EmitInt8(dwarf::DW_OP_regx);
diff --git a/lib/Target/ARM/ARMAsmPrinter.h b/lib/Target/ARM/ARMAsmPrinter.h
index e94901449a..5f9169ef7f 100644
--- a/lib/Target/ARM/ARMAsmPrinter.h
+++ b/lib/Target/ARM/ARMAsmPrinter.h
@@ -90,8 +90,7 @@ public:
MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
/// EmitDwarfRegOp - Emit dwarf register operation.
- virtual void EmitDwarfRegOp(const MachineLocation &MLoc,
- unsigned ExtraExprSize = 0) const;
+ virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
virtual unsigned getISAEncoding() {
// ARM/Darwin adds ISA to the DWARF info for each function.