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authorRichard Osborne <richard@xmos.com>2013-01-21 21:12:30 +0000
committerRichard Osborne <richard@xmos.com>2013-01-21 21:12:30 +0000
commit923cc3ebb06768bee730789a6cb44b9e8c6576bf (patch)
treef9187ef28a5f2d72bfbfdf237c6132c9d66c45ea /lib/Target/XCore
parent3c8da314f16ac268ad2a354a65e2578e777f2bad (diff)
Fix some incorrectly named u10 / lu10 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173090 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
-rw-r--r--lib/Target/XCore/XCoreInstrInfo.td37
1 files changed, 12 insertions, 25 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td
index 6288bb7c2f..3984140b6a 100644
--- a/lib/Target/XCore/XCoreInstrInfo.td
+++ b/lib/Target/XCore/XCoreInstrInfo.td
@@ -649,37 +649,24 @@ defm CLRSR_branch : FU6_LU6_np<0b0111101100, "clrsr">;
// TODO ldwcpl, blacp
let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in
-def LDAP_u10 : _FU10<
- (outs),
- (ins i32imm:$addr),
- "ldap r11, $addr",
- []>;
+def LDAPF_u10 : _FU10<(outs), (ins i32imm:$addr), "ldap r11, $addr", []>;
let Defs = [R11], isReMaterializable = 1 in
-def LDAP_lu10 : _FLU10<
- (outs),
- (ins i32imm:$addr),
- "ldap r11, $addr",
- [(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
+def LDAPF_lu10 : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr",
+ [(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
let Defs = [R11], isReMaterializable = 1 in
-def LDAP_lu10_ba : _FLU10<(outs),
- (ins i32imm:$addr),
- "ldap r11, $addr",
- [(set R11, (pcrelwrapper tblockaddress:$addr))]>;
+def LDAPF_lu10_ba : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr",
+ [(set R11, (pcrelwrapper tblockaddress:$addr))]>;
let isCall=1,
// All calls clobber the link register and the non-callee-saved registers:
Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in {
-def BL_u10 : _FU10<
- (outs), (ins calltarget:$target),
- "bl $target",
- [(XCoreBranchLink immU10:$target)]>;
-
-def BL_lu10 : _FLU10<
- (outs), (ins calltarget:$target),
- "bl $target",
- [(XCoreBranchLink immU20:$target)]>;
+def BLRF_u10 : _FU10<(outs), (ins calltarget:$target), "bl $target",
+ [(XCoreBranchLink immU10:$target)]>;
+
+def BLRF_lu10 : _FLU10<(outs), (ins calltarget:$target), "bl $target",
+ [(XCoreBranchLink immU20:$target)]>;
}
// Two operand short
@@ -979,8 +966,8 @@ def WAITEU_0R : _F0R<0b0000001100, (outs), (ins),
// Non-Instruction Patterns
//===----------------------------------------------------------------------===//
-def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr:$addr)>;
-def : Pat<(XCoreBranchLink texternalsym:$addr), (BL_lu10 texternalsym:$addr)>;
+def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BLRF_lu10 tglobaladdr:$addr)>;
+def : Pat<(XCoreBranchLink texternalsym:$addr), (BLRF_lu10 texternalsym:$addr)>;
/// sext_inreg
def : Pat<(sext_inreg GRRegs:$b, i1), (SEXT_rus GRRegs:$b, 1)>;