Combine FMA4 PS/PD patterns with the instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147364 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 42 insertions, 219 deletions

diff --git a/lib/Target/X86/X86InstrFMA.td b/lib/Target/X86/X86InstrFMA.td
index 99d991562f..f53a0074ef 100644
--- a/lib/Target/X86/X86InstrFMA.td
+++ b/lib/Target/X86/X86InstrFMA.td
@@ -116,64 +116,86 @@ multiclass fma4s<bits<8> opc, string OpcodeStr, Operand memop> {
            []>;
 }
 
-multiclass fma4p<bits<8> opc, string OpcodeStr> {
+multiclass fma4p<bits<8> opc, string OpcodeStr,
+                 Intrinsic Int128, Intrinsic Int256,
+                 PatFrag ld_frag128, PatFrag ld_frag256> {
   def rr : FMA4<opc, MRMSrcReg, (outs VR128:$dst),
            (ins VR128:$src1, VR128:$src2, VR128:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>, XOP_W;
+           [(set VR128:$dst,
+             (Int128 VR128:$src1, VR128:$src2, VR128:$src3))]>, XOP_W;
   def rm : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
            (ins VR128:$src1, VR128:$src2, f128mem:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>, XOP_W;
+           [(set VR128:$dst, (Int128 VR128:$src1, VR128:$src2,
+                              (ld_frag128 addr:$src3)))]>, XOP_W;
   def mr : FMA4<opc, MRMSrcMem, (outs VR128:$dst),
            (ins VR128:$src1, f128mem:$src2, VR128:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>;
+           [(set VR128:$dst,
+             (Int128 VR128:$src1, (ld_frag128 addr:$src2), VR128:$src3))]>;
   def rrY : FMA4<opc, MRMSrcReg, (outs VR256:$dst),
            (ins VR256:$src1, VR256:$src2, VR256:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>, XOP_W;
+           [(set VR256:$dst,
+             (Int256 VR256:$src1, VR256:$src2, VR256:$src3))]>, XOP_W;
   def rmY : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
            (ins VR256:$src1, VR256:$src2, f256mem:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>, XOP_W;
+           [(set VR256:$dst, (Int256 VR256:$src1, VR256:$src2,
+                              (ld_frag256 addr:$src3)))]>, XOP_W;
   def mrY : FMA4<opc, MRMSrcMem, (outs VR256:$dst),
            (ins VR256:$src1, f256mem:$src2, VR256:$src3),
            !strconcat(OpcodeStr,
            "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-           []>;
+           [(set VR256:$dst,
+             (Int256 VR256:$src1, (ld_frag256 addr:$src2), VR256:$src3))]>;
 }
 
 let isAsmParserOnly = 1 in {
   defm VFMADDSS4    : fma4s<0x6A, "vfmaddss", ssmem>;
   defm VFMADDSD4    : fma4s<0x6B, "vfmaddsd", sdmem>;
-  defm VFMADDPS4    : fma4p<0x68, "vfmaddps">;
-  defm VFMADDPD4    : fma4p<0x69, "vfmaddpd">;
+  defm VFMADDPS4    : fma4p<0x68, "vfmaddps", int_x86_fma4_vfmadd_ps,
+                            int_x86_fma4_vfmadd_ps_256, memopv4f32, memopv8f32>;
+  defm VFMADDPD4    : fma4p<0x69, "vfmaddpd", int_x86_fma4_vfmadd_pd,
+                            int_x86_fma4_vfmadd_pd_256, memopv2f64, memopv4f64>;
   defm VFMSUBSS4    : fma4s<0x6E, "vfmsubss", ssmem>;
   defm VFMSUBSD4    : fma4s<0x6F, "vfmsubsd", sdmem>;
-  defm VFMSUBPS4    : fma4p<0x6C, "vfmsubps">;
-  defm VFMSUBPD4    : fma4p<0x6D, "vfmsubpd">;
+  defm VFMSUBPS4    : fma4p<0x6C, "vfmsubps", int_x86_fma4_vfmsub_ps,
+                            int_x86_fma4_vfmsub_ps_256, memopv4f32, memopv8f32>;
+  defm VFMSUBPD4    : fma4p<0x6D, "vfmsubpd", int_x86_fma4_vfmsub_pd,
+                            int_x86_fma4_vfmsub_pd_256, memopv2f64, memopv4f64>;
   defm VFNMADDSS4   : fma4s<0x7A, "vfnmaddss", ssmem>;
   defm VFNMADDSD4   : fma4s<0x7B, "vfnmaddsd", sdmem>;
-  defm VFNMADDPS4   : fma4p<0x78, "vfnmaddps">;
-  defm VFNMADDPD4   : fma4p<0x79, "vfnmaddpd">;
+  defm VFNMADDPS4   : fma4p<0x78, "vfnmaddps", int_x86_fma4_vfnmadd_ps,
+                           int_x86_fma4_vfnmadd_ps_256, memopv4f32, memopv8f32>;
+  defm VFNMADDPD4   : fma4p<0x79, "vfnmaddpd", int_x86_fma4_vfnmadd_pd,
+                           int_x86_fma4_vfnmadd_pd_256, memopv2f64, memopv4f64>;
   defm VFNMSUBSS4   : fma4s<0x7E, "vfnmsubss", ssmem>;
   defm VFNMSUBSD4   : fma4s<0x7F, "vfnmsubsd", sdmem>;
-  defm VFNMSUBPS4   : fma4p<0x7C, "vfnmsubps">;
-  defm VFNMSUBPD4   : fma4p<0x7D, "vfnmsubpd">;
-  defm VFMADDSUBPS4 : fma4p<0x5C, "vfmaddsubps">;
-  defm VFMADDSUBPD4 : fma4p<0x5D, "vfmaddsubpd">;
-  defm VFMSUBADDPS4 : fma4p<0x5E, "vfmsubaddps">;
-  defm VFMSUBADDPD4 : fma4p<0x5F, "vfmsubaddpd">;
+  defm VFNMSUBPS4   : fma4p<0x7C, "vfnmsubps", int_x86_fma4_vfnmsub_ps,
+                           int_x86_fma4_vfnmsub_ps_256, memopv4f32, memopv8f32>;
+  defm VFNMSUBPD4   : fma4p<0x7D, "vfnmsubpd", int_x86_fma4_vfnmsub_pd,
+                           int_x86_fma4_vfnmsub_pd_256, memopv2f64, memopv4f64>;
+  defm VFMADDSUBPS4 : fma4p<0x5C, "vfmaddsubps", int_x86_fma4_vfmaddsub_ps,
+                         int_x86_fma4_vfmaddsub_ps_256, memopv4f32, memopv8f32>;
+  defm VFMADDSUBPD4 : fma4p<0x5D, "vfmaddsubpd", int_x86_fma4_vfmaddsub_pd,
+                         int_x86_fma4_vfmaddsub_pd_256, memopv2f64, memopv4f64>;
+  defm VFMSUBADDPS4 : fma4p<0x5E, "vfmsubaddps", int_x86_fma4_vfmsubadd_ps,
+                         int_x86_fma4_vfmsubadd_ps_256, memopv4f32, memopv8f32>;
+  defm VFMSUBADDPD4 : fma4p<0x5F, "vfmsubaddpd", int_x86_fma4_vfmsubadd_pd,
+                         int_x86_fma4_vfmsubadd_pd_256, memopv2f64, memopv4f64>;
 }
 
 // FMA4 Intrinsics patterns
 
+let Predicates = [HasFMA4] in {
+
 // VFMADD
 def : Pat<(int_x86_fma4_vfmadd_ss VR128:$src1, VR128:$src2, VR128:$src3),
           (VFMADDSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
@@ -189,42 +211,6 @@ def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 def : Pat<(int_x86_fma4_vfmadd_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
           (VFMADDSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFMADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_ps VR128:$src1, (memopv4f32 addr:$src2),
-                                  VR128:$src3),
-          (VFMADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFMADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_pd VR128:$src1, (memopv2f64 addr:$src2),
-                                  VR128:$src3),
-          (VFMADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFMADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFMADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFMADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFMADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
 // VFMSUB
 def : Pat<(int_x86_fma4_vfmsub_ss VR128:$src1, VR128:$src2, VR128:$src3),
           (VFMSUBSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
@@ -240,42 +226,6 @@ def : Pat<(int_x86_fma4_vfmsub_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3),
 def : Pat<(int_x86_fma4_vfmsub_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
           (VFMSUBSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFMSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_ps VR128:$src1, (memopv4f32 addr:$src2),
-                                  VR128:$src3),
-          (VFMSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFMSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_pd VR128:$src1, (memopv2f64 addr:$src2),
-                                  VR128:$src3),
-          (VFMSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFMSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFMSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFMSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsub_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFMSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
 // VFNMADD
 def : Pat<(int_x86_fma4_vfnmadd_ss VR128:$src1, VR128:$src2, VR128:$src3),
           (VFNMADDSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
@@ -291,42 +241,6 @@ def : Pat<(int_x86_fma4_vfnmadd_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3)
 def : Pat<(int_x86_fma4_vfnmadd_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
           (VFNMADDSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFNMADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFNMADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_ps VR128:$src1, (memopv4f32 addr:$src2),
-                                  VR128:$src3),
-          (VFNMADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFNMADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFNMADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_pd VR128:$src1, (memopv2f64 addr:$src2),
-                                  VR128:$src3),
-          (VFNMADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFNMADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFNMADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFNMADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFNMADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFNMADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFNMADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
 // VFNMSUB
 def : Pat<(int_x86_fma4_vfnmsub_ss VR128:$src1, VR128:$src2, VR128:$src3),
           (VFNMSUBSS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
@@ -342,114 +256,23 @@ def : Pat<(int_x86_fma4_vfnmsub_sd VR128:$src1, VR128:$src2, sse_load_f64:$src3)
 def : Pat<(int_x86_fma4_vfnmsub_sd VR128:$src1, sse_load_f64:$src2, VR128:$src3),
           (VFNMSUBSD4mr VR128:$src1, sse_load_f64:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFNMSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFNMSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_ps VR128:$src1, (memopv4f32 addr:$src2),
-                                  VR128:$src3),
-          (VFNMSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFNMSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFNMSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_pd VR128:$src1, (memopv2f64 addr:$src2),
-                                  VR128:$src3),
-          (VFNMSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFNMSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFNMSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_ps_256 VR256:$src1,
-                                      (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFNMSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFNMSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFNMSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfnmsub_pd_256 VR256:$src1,
-                                      (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFNMSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
 // VFMADDSUB
-def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMADDSUBPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFMADDSUBPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 def : Pat<(int_x86_fma4_vfmaddsub_ps VR128:$src1, (memopv4f32 addr:$src2),
                                   VR128:$src3),
           (VFMADDSUBPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMADDSUBPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFMADDSUBPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 def : Pat<(int_x86_fma4_vfmaddsub_pd VR128:$src1, (memopv2f64 addr:$src2),
                                   VR128:$src3),
           (VFMADDSUBPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMADDSUBPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFMADDSUBPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFMADDSUBPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMADDSUBPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFMADDSUBPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmaddsub_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFMADDSUBPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
 
 // VFMSUBADD
-def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMSUBADDPS4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, VR128:$src2,
-                                  (memopv4f32 addr:$src3)),
-          (VFMSUBADDPS4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 def : Pat<(int_x86_fma4_vfmsubadd_ps VR128:$src1, (memopv4f32 addr:$src2),
                                   VR128:$src3),
           (VFMSUBADDPS4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, VR128:$src2, VR128:$src3),
-          (VFMSUBADDPD4rr VR128:$src1, VR128:$src2, VR128:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, VR128:$src2,
-                                  (memopv2f64 addr:$src3)),
-          (VFMSUBADDPD4rm VR128:$src1, VR128:$src2, addr:$src3)>;
 def : Pat<(int_x86_fma4_vfmsubadd_pd VR128:$src1, (memopv2f64 addr:$src2),
                                   VR128:$src3),
           (VFMSUBADDPD4mr VR128:$src1, addr:$src2, VR128:$src3)>;
 
-def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMSUBADDPS4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, VR256:$src2,
-                                  (memopv8f32 addr:$src3)),
-          (VFMSUBADDPS4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_ps_256 VR256:$src1, (memopv8f32 addr:$src2),
-                                      VR256:$src3),
-          (VFMSUBADDPS4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
-
-def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, VR256:$src2, VR256:$src3),
-          (VFMSUBADDPD4rrY VR256:$src1, VR256:$src2, VR256:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, VR256:$src2,
-                                  (memopv4f64 addr:$src3)),
-          (VFMSUBADDPD4rmY VR256:$src1, VR256:$src2, addr:$src3)>;
-def : Pat<(int_x86_fma4_vfmsubadd_pd_256 VR256:$src1, (memopv4f64 addr:$src2),
-                                      VR256:$src3),
-          (VFMSUBADDPD4mrY VR256:$src1, addr:$src2, VR256:$src3)>;
+} // Predicates = [HasFMA4]