diff options
| author | Craig Topper <craig.topper@gmail.com> | 2012-06-03 00:30:49 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-06-03 00:30:49 +0000 |
| commit | 60dda3800861d31bf67130a16f1d62105254851a (patch) | |
| tree | 79df4e15a94f9521b19e4dfd23f1cfc334f78a9f /lib/Target/X86/X86InstrFMA.td | |
| parent | 1222c5c121e1284e37ae91b22a5b8bf6803b077f (diff) | |
Add neverHasSideEffects and mayLoad to FMA3 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157894 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrFMA.td')
| -rw-r--r-- | lib/Target/X86/X86InstrFMA.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrFMA.td b/lib/Target/X86/X86InstrFMA.td index 3dd642f2cf..0b57382d95 100644 --- a/lib/Target/X86/X86InstrFMA.td +++ b/lib/Target/X86/X86InstrFMA.td @@ -17,6 +17,7 @@ let Constraints = "$src1 = $dst" in { multiclass fma3p_rm<bits<8> opc, string OpcodeStr> { +let neverHasSideEffects = 1 in { def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, VR128:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), @@ -35,6 +36,7 @@ multiclass fma3p_rm<bits<8> opc, string OpcodeStr> { (ins VR256:$src1, VR256:$src2, f256mem:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), []>; +} // neverHasSideEffects = 1 } // Intrinsic for 132 pattern @@ -117,14 +119,17 @@ let ExeDomain = SSEPackedDouble in { let Constraints = "$src1 = $dst" in { multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, RegisterClass RC> { +let neverHasSideEffects = 1 in { def r : FMA3<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, RC:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), []>; + let mayLoad = 1 in def m : FMA3<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, RC:$src2, x86memop:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), []>; +} // neverHasSideEffects = 1 } multiclass fma3s_rm_int<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, |