Added the MachineSchedulerPass skeleton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148105 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 1 deletions

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index fb7bbbbe2e..90042dc1d5 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -23,6 +23,7 @@ using namespace llvm;
 
 namespace llvm {
   bool StrongPHIElim;
+  bool EnableMachineSched;
   bool HasDivModLibcall;
   bool AsmVerbosityDefault(false);
 }
@@ -35,7 +36,15 @@ static cl::opt<bool>
 FunctionSections("ffunction-sections",
   cl::desc("Emit functions into separate sections"),
   cl::init(false));
-                         
+
+/// EnableMachineSched - temporary flag to enable the machine scheduling pass
+/// until we complete the register allocation pass configuration cleanup.
+static cl::opt<bool, true>
+MachineSchedOpt("enable-misched",
+                cl::desc("Enable the machine instruction scheduling pass."),
+                cl::location(EnableMachineSched),
+                cl::init(false), cl::Hidden);
+
 //---------------------------------------------------------------------------
 // TargetMachine Class
 //