Pool-allocation for MachineInstrs, MachineBasicBlocks, and

MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 13 insertions, 13 deletions

diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index 2f4181335b..342caf87f9 100644
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -901,7 +901,7 @@ SparcTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
   // to set, the condition code register to branch on, the true/false values to
   // select between, and a branch opcode to use.
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator It = BB;
+  MachineFunction::iterator It = BB;
   ++It;
   
   //  thisMBB:
@@ -910,12 +910,12 @@ SparcTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
   //   [f]bCC copy1MBB
   //   fallthrough --> copy0MBB
   MachineBasicBlock *thisMBB = BB;
-  MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
-  BuildMI(BB, TII.get(BROpcode)).addMBB(sinkMBB).addImm(CC);
   MachineFunction *F = BB->getParent();
-  F->getBasicBlockList().insert(It, copy0MBB);
-  F->getBasicBlockList().insert(It, sinkMBB);
+  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  BuildMI(BB, TII.get(BROpcode)).addMBB(sinkMBB).addImm(CC);
+  F->insert(It, copy0MBB);
+  F->insert(It, sinkMBB);
   // Update machine-CFG edges by transferring all successors of the current
   // block to the new block which will contain the Phi node for the select.
   sinkMBB->transferSuccessors(BB);
@@ -939,7 +939,7 @@ SparcTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
     .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
     .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
   
-  delete MI;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
   return BB;
 }
 
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index 67df87b5f0..2476f4cc5e 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -162,7 +162,7 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
     Opc = SP::STDFri;
   else
     assert(0 && "Can't load this register");
-  MachineInstrBuilder MIB = BuildMI(get(Opc));
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc));
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -206,7 +206,7 @@ void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
     Opc = SP::LDDFri;
   else
     assert(0 && "Can't load this register");
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isReg())
@@ -236,10 +236,10 @@ MachineInstr *SparcInstrInfo::foldMemoryOperand(MachineFunction &MF,
     if (MI->getOperand(1).isRegister() && MI->getOperand(1).getReg() == SP::G0&&
         MI->getOperand(0).isRegister() && MI->getOperand(2).isRegister()) {
       if (OpNum == 0)    // COPY -> STORE
-        NewMI = BuildMI(get(SP::STri)).addFrameIndex(FI).addImm(0)
+        NewMI = BuildMI(MF, get(SP::STri)).addFrameIndex(FI).addImm(0)
                                    .addReg(MI->getOperand(2).getReg());
       else               // COPY -> LOAD
-        NewMI = BuildMI(get(SP::LDri), MI->getOperand(0).getReg())
+        NewMI = BuildMI(MF, get(SP::LDri), MI->getOperand(0).getReg())
                       .addFrameIndex(FI).addImm(0);
     }
     break;
@@ -250,12 +250,12 @@ MachineInstr *SparcInstrInfo::foldMemoryOperand(MachineFunction &MF,
     if (OpNum == 0) { // COPY -> STORE
       unsigned SrcReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = BuildMI(get(isFloat ? SP::STFri : SP::STDFri))
+      NewMI = BuildMI(MF, get(isFloat ? SP::STFri : SP::STDFri))
         .addFrameIndex(FI).addImm(0).addReg(SrcReg, false, false, isKill);
     } else {             // COPY -> LOAD
       unsigned DstReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = BuildMI(get(isFloat ? SP::LDFri : SP::LDDFri))
+      NewMI = BuildMI(MF, get(isFloat ? SP::LDFri : SP::LDDFri))
         .addReg(DstReg, true, false, false, isDead).addFrameIndex(FI).addImm(0);
     }
     break;